bcm27xx: update 6.1 patches to latest version
[openwrt/staging/dangole.git] / target / linux / bcm27xx / patches-6.1 / 950-0954-drm-vc4-hvs-Remove-ABORT_ON_EMPTY-flag.patch
1 From 712bccec241e84e28ccb725fae87d3255d039f42 Mon Sep 17 00:00:00 2001
2 From: Dom Cobley <popcornmix@gmail.com>
3 Date: Thu, 22 Jun 2023 14:06:40 +0100
4 Subject: [PATCH] drm/vc4: hvs: Remove ABORT_ON_EMPTY flag
5
6 ABORT_ON_EMPTY chooses whether the HVS abandons the current frame
7 when it experiences an underflow, or attempts to continue.
8
9 In theory the frame should be black from the point of underflow,
10 compared to a shift of sebsequent pixels to the left.
11
12 Unfortunately it seems to put the HVS is a bad state where it is not
13 possible to recover simply. This typically requires a reboot
14 following the 'flip done timed out message'.
15
16 Discussion with Broadcom has suggested we don't use this flag.
17 All their testing is done with it disabled.
18
19 Additionally setting BLANK_INSERT_EN causes the HDMI to output
20 blank pixels on an underflow which avoids it losing sync.
21
22 After this change a 'flip done timed out' due to sdram bandwidth
23 starvation or too low a clock is recoverable once the situation improves.
24
25 Signed-off-by: Dom Cobley <popcornmix@gmail.com>
26 ---
27 drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
28 drivers/gpu/drm/vc4/vc4_regs.h | 1 +
29 2 files changed, 2 insertions(+)
30
31 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
32 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
33 @@ -1866,6 +1866,7 @@ static void vc4_hdmi_encoder_post_crtc_e
34 VC4_HD_VID_CTL_CLRRGB |
35 VC4_HD_VID_CTL_UNDERFLOW_ENABLE |
36 VC4_HD_VID_CTL_FRAME_COUNTER_RESET |
37 + VC4_HD_VID_CTL_BLANK_INSERT_EN |
38 (vsync_pos ? 0 : VC4_HD_VID_CTL_VSYNC_LOW) |
39 (hsync_pos ? 0 : VC4_HD_VID_CTL_HSYNC_LOW));
40
41 --- a/drivers/gpu/drm/vc4/vc4_regs.h
42 +++ b/drivers/gpu/drm/vc4/vc4_regs.h
43 @@ -799,6 +799,7 @@ enum {
44 # define VC4_HD_VID_CTL_CLRSYNC BIT(24)
45 # define VC4_HD_VID_CTL_CLRRGB BIT(23)
46 # define VC4_HD_VID_CTL_BLANKPIX BIT(18)
47 +# define VC4_HD_VID_CTL_BLANK_INSERT_EN BIT(16)
48
49 # define VC4_HD_CSC_CTL_ORDER_MASK VC4_MASK(7, 5)
50 # define VC4_HD_CSC_CTL_ORDER_SHIFT 5