bcm27xx: update 6.1 patches to latest version
[openwrt/staging/dangole.git] / target / linux / bcm27xx / patches-6.1 / 950-0864-net-macb-Also-set-DMA-coherent-mask.patch
1 From bd36586dd9e05bde8e23dc3d99771269b48b65f8 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Fri, 10 Sep 2021 17:20:45 +0100
4 Subject: [PATCH] net: macb: Also set DMA coherent mask
5
6 macb: Add device tree properties that allow configuration of the AXI max pipeline register
7
8 net: macb: add support for ethtool interrupt moderation configuration
9
10 Only global throttling of rx or tx by time quanta is supported.
11
12 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
13
14 macb: add platform device shutdown function. Prevents AXI master over PCIE from hanging when the host is rebooted.
15
16 net: macb: increase polling interval for MDIO completion
17
18 MDIO is a slow bus (single-digit MHz). Polling at 1us intervals
19 is a bit aggressive, so increase to 100us as the transaction
20 usually takes 100-200us to complete.
21
22 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
23
24 net: macb: Several patches for RP1
25
26 64-bit RX fix
27
28 Also set DMA coherent mask
29
30 Add device tree properties that allow configuration of the AXI max
31 pipeline register
32
33 Add support for ethtool interrupt moderation configuration
34
35 Only global throttling of rx or tx by time quanta is supported.
36
37 Add platform device shutdown function. Prevents AXI master over PCIE
38 from hanging when the host is rebooted.
39
40 Increase polling interval for MDIO completion
41
42 MDIO is a slow bus (single-digit MHz). Polling at 1us intervals
43 is a bit aggressive, so increase to 100us as the transaction
44 usually takes 100-200us to complete.
45
46 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
47
48 net: macb: Support the phy-reset-gpios property
49
50 Allow a PHY to be reset with an optional GPIO. The reset duration can
51 be specified in milliseconds - the default is 10ms.
52
53 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
54
55 drivers: net: macb: close device on driver shutdown
56
57 Fix some suspicious locking and instead call into macb_close, which
58 deregisters and frees all resources the corresponding macb_open
59 claimed.
60
61 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
62
63 net: macb: add hack to prevent TX stalls in a quiet system
64
65 See https://github.com/raspberrypi/linux-2712/issues/89
66
67 There is some critical window during TX where a further write to the
68 TSTART bit while TX is active does not cause newly queued TX descriptors
69 to be consumed.
70
71 For now "wait a bit, then try anyway" seems to work.
72
73 Requires further investigation, but this unsticks NFS reliably.
74
75 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
76
77 net: macb: set default interrupt moderation for GEM hardware
78
79 Defaulting to intmod = 0 is antisocial, as the MAC can generate over
80 130,000 interrupts per second. 50us is a sensible default.
81
82 Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
83 ---
84 drivers/net/ethernet/cadence/macb.h | 25 ++++
85 drivers/net/ethernet/cadence/macb_main.c | 151 ++++++++++++++++++++++-
86 2 files changed, 174 insertions(+), 2 deletions(-)
87
88 --- a/drivers/net/ethernet/cadence/macb.h
89 +++ b/drivers/net/ethernet/cadence/macb.h
90 @@ -84,6 +84,8 @@
91 #define GEM_DMACFG 0x0010 /* DMA Configuration */
92 #define GEM_JML 0x0048 /* Jumbo Max Length */
93 #define GEM_HS_MAC_CONFIG 0x0050 /* GEM high speed config */
94 +#define GEM_AMP 0x0054 /* AXI Max Pipeline */
95 +#define GEM_INTMOD 0x005c /* Interrupt moderation */
96 #define GEM_HRB 0x0080 /* Hash Bottom */
97 #define GEM_HRT 0x0084 /* Hash Top */
98 #define GEM_SA1B 0x0088 /* Specific1 Bottom */
99 @@ -346,6 +348,21 @@
100 #define GEM_ADDR64_OFFSET 30 /* Address bus width - 64b or 32b */
101 #define GEM_ADDR64_SIZE 1
102
103 +/* Bitfields in AMP */
104 +#define GEM_AR2R_MAX_PIPE_OFFSET 0 /* Maximum number of outstanding AXI read requests */
105 +#define GEM_AR2R_MAX_PIPE_SIZE 8
106 +#define GEM_AW2W_MAX_PIPE_OFFSET 8 /* Maximum number of outstanding AXI write requests */
107 +#define GEM_AW2W_MAX_PIPE_SIZE 8
108 +#define GEM_AW2B_FILL_OFFSET 16 /* Select wether the max AW2W transactions operates between: */
109 +#define GEM_AW2B_FILL_AW2W 0 /* 0: the AW to W AXI channel */
110 +#define GEM_AW2B_FILL_AW2B 1 /* 1: AW to B channel */
111 +#define GEM_AW2B_FILL_SIZE 1
112 +
113 +/* Bitfields in INTMOD */
114 +#define GEM_RX_MODERATION_OFFSET 0 /* RX interrupt moderation */
115 +#define GEM_RX_MODERATION_SIZE 8
116 +#define GEM_TX_MODERATION_OFFSET 16 /* TX interrupt moderation */
117 +#define GEM_TX_MODERATION_SIZE 8
118
119 /* Bitfields in NSR */
120 #define MACB_NSR_LINK_OFFSET 0 /* pcs_link_state */
121 @@ -798,6 +815,7 @@
122 })
123
124 #define MACB_READ_NSR(bp) macb_readl(bp, NSR)
125 +#define MACB_READ_TSR(bp) macb_readl(bp, TSR)
126
127 /* struct macb_dma_desc - Hardware DMA descriptor
128 * @addr: DMA address of data buffer
129 @@ -1217,6 +1235,7 @@ struct macb_queue {
130 dma_addr_t tx_ring_dma;
131 struct work_struct tx_error_task;
132 bool txubr_pending;
133 + bool tx_pending;
134 struct napi_struct napi_tx;
135
136 dma_addr_t rx_ring_dma;
137 @@ -1286,9 +1305,15 @@ struct macb {
138
139 u32 caps;
140 unsigned int dma_burst_length;
141 + u8 aw2w_max_pipe;
142 + u8 ar2r_max_pipe;
143 + bool use_aw2b_fill;
144
145 phy_interface_t phy_interface;
146
147 + struct gpio_desc *phy_reset_gpio;
148 + int phy_reset_ms;
149 +
150 /* AT91RM9200 transmit queue (1 on wire + 1 queued) */
151 struct macb_tx_skb rm9200_txq[2];
152 unsigned int max_tx_length;
153 --- a/drivers/net/ethernet/cadence/macb_main.c
154 +++ b/drivers/net/ethernet/cadence/macb_main.c
155 @@ -41,6 +41,9 @@
156 #include <linux/firmware/xlnx-zynqmp.h>
157 #include "macb.h"
158
159 +static unsigned int txdelay = 35;
160 +module_param(txdelay, uint, 0644);
161 +
162 /* This structure is only used for MACB on SiFive FU540 devices */
163 struct sifive_fu540_macb_mgmt {
164 void __iomem *reg;
165 @@ -336,7 +339,7 @@ static int macb_mdio_wait_for_idle(struc
166 u32 val;
167
168 return readx_poll_timeout(MACB_READ_NSR, bp, val, val & MACB_BIT(IDLE),
169 - 1, MACB_MDIO_TIMEOUT);
170 + 100, MACB_MDIO_TIMEOUT);
171 }
172
173 static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
174 @@ -442,6 +445,19 @@ mdio_pm_exit:
175 return status;
176 }
177
178 +static int macb_mdio_reset(struct mii_bus *bus)
179 +{
180 + struct macb *bp = bus->priv;
181 +
182 + if (bp->phy_reset_gpio) {
183 + gpiod_set_value_cansleep(bp->phy_reset_gpio, 1);
184 + msleep(bp->phy_reset_ms);
185 + gpiod_set_value_cansleep(bp->phy_reset_gpio, 0);
186 + }
187 +
188 + return 0;
189 +}
190 +
191 static void macb_init_buffers(struct macb *bp)
192 {
193 struct macb_queue *queue;
194 @@ -915,6 +931,7 @@ static int macb_mii_init(struct macb *bp
195 bp->mii_bus->name = "MACB_mii_bus";
196 bp->mii_bus->read = &macb_mdio_read;
197 bp->mii_bus->write = &macb_mdio_write;
198 + bp->mii_bus->reset = &macb_mdio_reset;
199 snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
200 bp->pdev->name, bp->pdev->id);
201 bp->mii_bus->priv = bp;
202 @@ -1584,6 +1601,11 @@ static int macb_rx(struct macb_queue *qu
203
204 macb_init_rx_ring(queue);
205 queue_writel(queue, RBQP, queue->rx_ring_dma);
206 +#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
207 + if (bp->hw_dma_cap & HW_DMA_CAP_64B)
208 + macb_writel(bp, RBQPH,
209 + upper_32_bits(queue->rx_ring_dma));
210 +#endif
211
212 macb_writel(bp, NCR, ctrl | MACB_BIT(RE));
213
214 @@ -1884,8 +1906,9 @@ static irqreturn_t macb_interrupt(int ir
215 queue_writel(queue, ISR, MACB_BIT(TCOMP) |
216 MACB_BIT(TXUBR));
217
218 - if (status & MACB_BIT(TXUBR)) {
219 + if (status & MACB_BIT(TXUBR) || queue->tx_pending) {
220 queue->txubr_pending = true;
221 + queue->tx_pending = 0;
222 wmb(); // ensure softirq can see update
223 }
224
225 @@ -2332,6 +2355,11 @@ static netdev_tx_t macb_start_xmit(struc
226 skb_tx_timestamp(skb);
227
228 spin_lock_irq(&bp->lock);
229 +
230 + /* TSTART write might get dropped, so make the IRQ retrigger a buffer read */
231 + if (macb_readl(bp, TSR) & MACB_BIT(TGO))
232 + queue->tx_pending = 1;
233 +
234 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
235 spin_unlock_irq(&bp->lock);
236
237 @@ -2699,6 +2727,37 @@ static void macb_configure_dma(struct ma
238 }
239 }
240
241 +static void gem_init_axi(struct macb *bp)
242 +{
243 + u32 amp;
244 +
245 + /* AXI pipeline setup - don't touch values unless specified in device
246 + * tree. Some hardware could have reset values > 1.
247 + */
248 + amp = gem_readl(bp, AMP);
249 +
250 + if (bp->use_aw2b_fill)
251 + amp = GEM_BFINS(AW2B_FILL, bp->use_aw2b_fill, amp);
252 + if (bp->aw2w_max_pipe)
253 + amp = GEM_BFINS(AW2W_MAX_PIPE, bp->aw2w_max_pipe, amp);
254 + if (bp->ar2r_max_pipe)
255 + amp = GEM_BFINS(AR2R_MAX_PIPE, bp->ar2r_max_pipe, amp);
256 +
257 + gem_writel(bp, AMP, amp);
258 +}
259 +
260 +static void gem_init_intmod(struct macb *bp)
261 +{
262 + unsigned int throttle;
263 + u32 intmod = 0;
264 +
265 + /* Use sensible interrupt moderation thresholds (50us rx and tx) */
266 + throttle = (1000 * 50) / 800;
267 + intmod = GEM_BFINS(TX_MODERATION, throttle, intmod);
268 + intmod = GEM_BFINS(RX_MODERATION, throttle, intmod);
269 + gem_writel(bp, INTMOD, intmod);
270 +}
271 +
272 static void macb_init_hw(struct macb *bp)
273 {
274 u32 config;
275 @@ -2727,6 +2786,11 @@ static void macb_init_hw(struct macb *bp
276 if (bp->caps & MACB_CAPS_JUMBO)
277 bp->rx_frm_len_mask = MACB_RX_JFRMLEN_MASK;
278
279 + if (macb_is_gem(bp)) {
280 + gem_init_axi(bp);
281 + gem_init_intmod(bp);
282 + }
283 +
284 macb_configure_dma(bp);
285 }
286
287 @@ -3072,6 +3136,52 @@ static void gem_get_ethtool_strings(stru
288 }
289 }
290
291 +static int gem_set_coalesce(struct net_device *dev,
292 + struct ethtool_coalesce *ec,
293 + struct kernel_ethtool_coalesce *kernel_coal,
294 + struct netlink_ext_ack *extack)
295 +{
296 + struct macb *bp = netdev_priv(dev);
297 + unsigned int tx_throttle;
298 + unsigned int rx_throttle;
299 + u32 intmod = 0;
300 +
301 + /* GEM has simple IRQ throttling support. RX and TX interrupts
302 + * are separately moderated on 800ns quantums, with no support
303 + * for frame coalescing.
304 + */
305 +
306 + /* Max is 255 * 0.8us = 204us. Zero implies no moderation. */
307 + if (ec->rx_coalesce_usecs > 204 || ec->tx_coalesce_usecs > 204)
308 + return -EINVAL;
309 +
310 + tx_throttle = (1000 * ec->tx_coalesce_usecs) / 800;
311 + rx_throttle = (1000 * ec->rx_coalesce_usecs) / 800;
312 +
313 + intmod = GEM_BFINS(TX_MODERATION, tx_throttle, intmod);
314 + intmod = GEM_BFINS(RX_MODERATION, rx_throttle, intmod);
315 +
316 + gem_writel(bp, INTMOD, intmod);
317 +
318 + return 0;
319 +}
320 +
321 +static int gem_get_coalesce(struct net_device *dev,
322 + struct ethtool_coalesce *ec,
323 + struct kernel_ethtool_coalesce *kernel_coal,
324 + struct netlink_ext_ack *extack)
325 +{
326 + struct macb *bp = netdev_priv(dev);
327 + u32 intmod;
328 +
329 + intmod = gem_readl(bp, INTMOD);
330 +
331 + ec->tx_coalesce_usecs = (GEM_BFEXT(TX_MODERATION, intmod) * 800) / 1000;
332 + ec->rx_coalesce_usecs = (GEM_BFEXT(RX_MODERATION, intmod) * 800) / 1000;
333 +
334 + return 0;
335 +}
336 +
337 static struct net_device_stats *macb_get_stats(struct net_device *dev)
338 {
339 struct macb *bp = netdev_priv(dev);
340 @@ -3664,6 +3774,8 @@ static const struct ethtool_ops macb_eth
341 };
342
343 static const struct ethtool_ops gem_ethtool_ops = {
344 + .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
345 + ETHTOOL_COALESCE_TX_USECS,
346 .get_regs_len = macb_get_regs_len,
347 .get_regs = macb_get_regs,
348 .get_wol = macb_get_wol,
349 @@ -3673,6 +3785,8 @@ static const struct ethtool_ops gem_etht
350 .get_ethtool_stats = gem_get_ethtool_stats,
351 .get_strings = gem_get_ethtool_strings,
352 .get_sset_count = gem_get_sset_count,
353 + .get_coalesce = gem_get_coalesce,
354 + .set_coalesce = gem_set_coalesce,
355 .get_link_ksettings = macb_get_link_ksettings,
356 .set_link_ksettings = macb_set_link_ksettings,
357 .get_ringparam = macb_get_ringparam,
358 @@ -4940,6 +5054,10 @@ static int macb_probe(struct platform_de
359
360 bp->usrio = macb_config->usrio;
361
362 + device_property_read_u8(&pdev->dev, "cdns,aw2w-max-pipe", &bp->aw2w_max_pipe);
363 + device_property_read_u8(&pdev->dev, "cdns,ar2r-max-pipe", &bp->ar2r_max_pipe);
364 + bp->use_aw2b_fill = device_property_read_bool(&pdev->dev, "cdns,use-aw2b-fill");
365 +
366 spin_lock_init(&bp->lock);
367
368 /* setup capabilities */
369 @@ -4995,6 +5113,21 @@ static int macb_probe(struct platform_de
370 else
371 bp->phy_interface = interface;
372
373 + /* optional PHY reset-related properties */
374 + bp->phy_reset_gpio = devm_gpiod_get_optional(&pdev->dev, "phy-reset",
375 + GPIOD_OUT_LOW);
376 + if (IS_ERR(bp->phy_reset_gpio)) {
377 + dev_err(&pdev->dev, "Failed to obtain phy-reset gpio\n");
378 + err = PTR_ERR(bp->phy_reset_gpio);
379 + goto err_out_free_netdev;
380 + }
381 +
382 + bp->phy_reset_ms = 10;
383 + of_property_read_u32(np, "phy-reset-duration", &bp->phy_reset_ms);
384 + /* A sane reset duration should not be longer than 1s */
385 + if (bp->phy_reset_ms > 1000)
386 + bp->phy_reset_ms = 1000;
387 +
388 /* IP specific init */
389 err = init(pdev);
390 if (err)
391 @@ -5071,6 +5204,19 @@ static int macb_remove(struct platform_d
392 return 0;
393 }
394
395 +static void macb_shutdown(struct platform_device *pdev)
396 +{
397 + struct net_device *dev;
398 +
399 + dev = platform_get_drvdata(pdev);
400 +
401 + rtnl_lock();
402 + netif_device_detach(dev);
403 + if (netif_running(dev))
404 + dev_close(dev);
405 + rtnl_unlock();
406 +}
407 +
408 static int __maybe_unused macb_suspend(struct device *dev)
409 {
410 struct net_device *netdev = dev_get_drvdata(dev);
411 @@ -5285,6 +5431,7 @@ static const struct dev_pm_ops macb_pm_o
412 static struct platform_driver macb_driver = {
413 .probe = macb_probe,
414 .remove = macb_remove,
415 + .shutdown = macb_shutdown,
416 .driver = {
417 .name = "macb",
418 .of_match_table = of_match_ptr(macb_dt_ids),