target/linux/ramips/patches-4.4/101-mt7621-timer.patch

   1 Index: linux-4.4.74/arch/mips/include/asm/smp.h
   2 ===================================================================
   3 --- linux-4.4.74.orig/arch/mips/include/asm/smp.h
   4 +++ linux-4.4.74/arch/mips/include/asm/smp.h
   5 @@ -16,12 +16,14 @@
   6  #include <linux/smp.h>
   7  #include <linux/threads.h>
   8  #include <linux/cpumask.h>
   9 +#include <linux/cache.h>
  10
  11  #include <linux/atomic.h>
  12  #include <asm/smp-ops.h>
  13 +#include <asm/percpu.h>
  14
  15  extern int smp_num_siblings;
  16 -extern cpumask_t cpu_sibling_map[];
  17 +DECLARE_PER_CPU_SHARED_ALIGNED(cpumask_t, cpu_sibling_map);
  18  extern cpumask_t cpu_core_map[];
  19  extern cpumask_t cpu_foreign_map;
  20
  21 Index: linux-4.4.74/arch/mips/kernel/proc.c
  22 ===================================================================
  23 --- linux-4.4.74.orig/arch/mips/kernel/proc.c
  24 +++ linux-4.4.74/arch/mips/kernel/proc.c
  25 @@ -134,6 +134,14 @@ static int show_cpuinfo(struct seq_file
  26         seq_printf(m, "package\t\t\t: %d\n", cpu_data[n].package);
  27         seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
  28
  29 +#if defined(CONFIG_MIPS_MT_SMP) || defined(CONFIG_MIPS_MT_SMTC)
  30 +       if (cpu_has_mipsmt) {
  31 +               seq_printf(m, "VPE\t\t\t: %d\n", cpu_data[n].vpe_id);
  32 +#if defined(CONFIG_MIPS_MT_SMTC)
  33 +               seq_printf(m, "TC\t\t\t: %d\n", cpu_data[n].tc_id);
  34 +#endif
  35 +       }
  36 +#endif
  37         sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
  38                       cpu_has_vce ? "%u" : "not available");
  39         seq_printf(m, fmt, 'D', vced_count);
  40 Index: linux-4.4.74/arch/mips/kernel/smp-cmp.c
  41 ===================================================================
  42 --- linux-4.4.74.orig/arch/mips/kernel/smp-cmp.c
  43 +++ linux-4.4.74/arch/mips/kernel/smp-cmp.c
  44 @@ -43,9 +43,19 @@ static void cmp_init_secondary(void)
  45  {
  46         struct cpuinfo_mips *c __maybe_unused = &current_cpu_data;
  47
  48 +#ifdef CONFIG_SOC_MT7621
  49 +       if(cpu_has_veic) {
  50 +               change_c0_status(ST0_IM, 0);
  51 +       } else {
  52 +               change_c0_status(ST0_IM, STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP4 | STATUSF_IP5 | STATUSF_IP6 | STATUSF_IP7);
  53 +       }
  54 +#else
  55         /* Assume GIC is present */
  56         change_c0_status(ST0_IM, STATUSF_IP2 | STATUSF_IP3 | STATUSF_IP4 |
  57                                  STATUSF_IP5 | STATUSF_IP6 | STATUSF_IP7);
  58 +#endif
  59 +
  60 +       c->core = (read_c0_ebase() & 0x3ff) >> (fls(smp_num_siblings)-1);
  61
  62         /* Enable per-cpu interrupts: platform specific */
  63
  64 Index: linux-4.4.74/arch/mips/kernel/smp.c
  65 ===================================================================
  66 --- linux-4.4.74.orig/arch/mips/kernel/smp.c
  67 +++ linux-4.4.74/arch/mips/kernel/smp.c
  68 @@ -57,8 +57,8 @@ int smp_num_siblings = 1;
  69  EXPORT_SYMBOL(smp_num_siblings);
  70
  71  /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  72 -cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  73 -EXPORT_SYMBOL(cpu_sibling_map);
  74 +DEFINE_PER_CPU_SHARED_ALIGNED(struct cpumask, cpu_sibling_map);
  75 +EXPORT_PER_CPU_SYMBOL(cpu_sibling_map);
  76
  77  /* representing the core map of multi-core chips of each logical CPU */
  78  cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
  79 @@ -89,12 +89,13 @@ static inline void set_cpu_sibling_map(i
  80                 for_each_cpu(i, &cpu_sibling_setup_map) {
  81                         if (cpu_data[cpu].package == cpu_data[i].package &&
  82                                     cpu_data[cpu].core == cpu_data[i].core) {
  83 -                               cpumask_set_cpu(i, &cpu_sibling_map[cpu]);
  84 -                               cpumask_set_cpu(cpu, &cpu_sibling_map[i]);
  85 +                                       cpumask_set_cpu(i, &per_cpu(cpu_sibling_map, cpu));
  86 +                                       cpumask_set_cpu(cpu, &per_cpu(cpu_sibling_map, i));
  87 +
  88                         }
  89                 }
  90         } else
  91 -               cpumask_set_cpu(cpu, &cpu_sibling_map[cpu]);
  92 +               cpumask_set_cpu(cpu, &per_cpu(cpu_sibling_map, cpu));
  93  }
  94
  95  static inline void set_cpu_core_map(int cpu)
  96 Index: linux-4.4.74/arch/mips/ralink/mt7621.c
  97 ===================================================================
  98 --- linux-4.4.74.orig/arch/mips/ralink/mt7621.c
  99 +++ linux-4.4.74/arch/mips/ralink/mt7621.c
 100 @@ -21,6 +21,7 @@
 101  #include <asm/mach-ralink/ralink_regs.h>
 102  #include <asm/mach-ralink/mt7621.h>
 103  #include <asm/mips-boards/launch.h>
 104 +#include <asm/delay.h>
 105
 106  #include <pinmux.h>
 107
 108 @@ -178,6 +179,58 @@ bool plat_cpu_core_present(int core)
 109         return true;
 110  }
 111
 112 +#define LPS_PREC 8
 113 +/*
 114 +*  Re-calibration lpj(loop-per-jiffy).
 115 +*  (derived from kernel/calibrate.c)
 116 +*/
 117 +static int udelay_recal(void)
 118 +{
 119 +       unsigned int i, lpj = 0;
 120 +       unsigned long ticks, loopbit;
 121 +       int lps_precision = LPS_PREC;
 122 +
 123 +       lpj = (1<<12);
 124 +
 125 +       while ((lpj <<= 1) != 0) {
 126 +               /* wait for "start of" clock tick */
 127 +               ticks = jiffies;
 128 +               while (ticks == jiffies)
 129 +                       /* nothing */;
 130 +
 131 +               /* Go .. */
 132 +               ticks = jiffies;
 133 +               __delay(lpj);
 134 +               ticks = jiffies - ticks;
 135 +               if (ticks)
 136 +                       break;
 137 +       }
 138 +
 139 +       /*
 140 +        * Do a binary approximation to get lpj set to
 141 +        * equal one clock (up to lps_precision bits)
 142 +        */
 143 +       lpj >>= 1;
 144 +       loopbit = lpj;
 145 +       while (lps_precision-- && (loopbit >>= 1)) {
 146 +               lpj |= loopbit;
 147 +               ticks = jiffies;
 148 +               while (ticks == jiffies)
 149 +                       /* nothing */;
 150 +               ticks = jiffies;
 151 +               __delay(lpj);
 152 +               if (jiffies != ticks)   /* longer than 1 tick */
 153 +                       lpj &= ~loopbit;
 154 +       }
 155 +       printk(KERN_INFO "%d CPUs re-calibrate udelay(lpj = %d)\n", NR_CPUS, lpj);
 156 +
 157 +       for(i=0; i< NR_CPUS; i++)
 158 +               cpu_data[i].udelay_val = lpj;
 159 +
 160 +       return 0;
 161 +}
 162 +device_initcall(udelay_recal);
 163 +
 164  void prom_soc_init(struct ralink_soc_info *soc_info)
 165  {
 166         void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
 167 Index: linux-4.4.74/arch/mips/include/asm/topology.h
 168 ===================================================================
 169 --- linux-4.4.74.orig/arch/mips/include/asm/topology.h
 170 +++ linux-4.4.74/arch/mips/include/asm/topology.h
 171 @@ -15,7 +15,7 @@
 172  #define topology_physical_package_id(cpu)      (cpu_data[cpu].package)
 173  #define topology_core_id(cpu)                  (cpu_data[cpu].core)
 174  #define topology_core_cpumask(cpu)             (&cpu_core_map[cpu])
 175 -#define topology_sibling_cpumask(cpu)          (&cpu_sibling_map[cpu])
 176 +#define topology_sibling_cpumask(cpu)          (&per_cpu(cpu_sibling_map, cpu))
 177  #endif
 178
 179  #endif /* __ASM_TOPOLOGY_H */
 180 Index: linux-4.4.74/arch/mips/mm/c-r4k.c
 181 ===================================================================
 182 --- linux-4.4.74.orig/arch/mips/mm/c-r4k.c
 183 +++ linux-4.4.74/arch/mips/mm/c-r4k.c
 184 @@ -103,7 +103,7 @@ static inline void r4k_on_each_cpu(unsig
 185
 186                 /* exclude sibling CPUs */
 187                 cpumask_andnot(&mask, &cpu_foreign_map,
 188 -                              &cpu_sibling_map[smp_processor_id()]);
 189 +                              &per_cpu(cpu_sibling_map, smp_processor_id()));
 190                 smp_call_function_many(&mask, func, info, 1);
 191         }
 192  #endif