target/linux/realtek/dts/rtl8382_d-link_dgs-1210-28.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "rtl8382_d-link_dgs-1210.dtsi"
   4
   5 / {
   6         compatible = "d-link,dgs-1210-28", "realtek,rtl838x-soc";
   7         model = "D-Link DGS-1210-28";
   8 };
   9
  10 &ethernet0 {
  11         mdio: mdio-bus {
  12                 compatible = "realtek,rtl838x-mdio";
  13                 regmap = <&ethernet0>;
  14                 #address-cells = <1>;
  15                 #size-cells = <0>;
  16
  17                 EXTERNAL_PHY(0)
  18                 EXTERNAL_PHY(1)
  19                 EXTERNAL_PHY(2)
  20                 EXTERNAL_PHY(3)
  21                 EXTERNAL_PHY(4)
  22                 EXTERNAL_PHY(5)
  23                 EXTERNAL_PHY(6)
  24                 EXTERNAL_PHY(7)
  25
  26                 INTERNAL_PHY(8)
  27                 INTERNAL_PHY(9)
  28                 INTERNAL_PHY(10)
  29                 INTERNAL_PHY(11)
  30                 INTERNAL_PHY(12)
  31                 INTERNAL_PHY(13)
  32                 INTERNAL_PHY(14)
  33                 INTERNAL_PHY(15)
  34
  35                 EXTERNAL_PHY(16)
  36                 EXTERNAL_PHY(17)
  37                 EXTERNAL_PHY(18)
  38                 EXTERNAL_PHY(19)
  39                 EXTERNAL_PHY(20)
  40                 EXTERNAL_PHY(21)
  41                 EXTERNAL_PHY(22)
  42                 EXTERNAL_PHY(23)
  43
  44                 EXTERNAL_SFP_PHY(24)
  45                 EXTERNAL_SFP_PHY(25)
  46                 EXTERNAL_SFP_PHY(26)
  47                 EXTERNAL_SFP_PHY(27)
  48         };
  49 };
  50
  51 &switch0 {
  52         ports {
  53                 #address-cells = <1>;
  54                 #size-cells = <0>;
  55
  56                 SWITCH_PORT(0, 1, qsgmii)
  57                 SWITCH_PORT(1, 2, qsgmii)
  58                 SWITCH_PORT(2, 3, qsgmii)
  59                 SWITCH_PORT(3, 4, qsgmii)
  60                 SWITCH_PORT(4, 5, qsgmii)
  61                 SWITCH_PORT(5, 6, qsgmii)
  62                 SWITCH_PORT(6, 7, qsgmii)
  63                 SWITCH_PORT(7, 8, qsgmii)
  64
  65                 SWITCH_PORT(8, 9, internal)
  66                 SWITCH_PORT(9, 10, internal)
  67                 SWITCH_PORT(10, 11, internal)
  68                 SWITCH_PORT(11, 12, internal)
  69                 SWITCH_PORT(12, 13, internal)
  70                 SWITCH_PORT(13, 14, internal)
  71                 SWITCH_PORT(14, 15, internal)
  72                 SWITCH_PORT(15, 16, internal)
  73
  74                 SWITCH_PORT(16, 17, qsgmii)
  75                 SWITCH_PORT(17, 18, qsgmii)
  76                 SWITCH_PORT(18, 19, qsgmii)
  77                 SWITCH_PORT(19, 20, qsgmii)
  78                 SWITCH_PORT(20, 21, qsgmii)
  79                 SWITCH_PORT(21, 22, qsgmii)
  80                 SWITCH_PORT(22, 23, qsgmii)
  81                 SWITCH_PORT(23, 24, qsgmii)
  82
  83                 SWITCH_PORT(24, 25, qsgmii)
  84                 SWITCH_PORT(25, 26, qsgmii)
  85                 SWITCH_PORT(26, 27, qsgmii)
  86                 SWITCH_PORT(27, 28, qsgmii)
  87
  88                 port@28 {
  89                         ethernet = <&ethernet0>;
  90                         reg = <28>;
  91                         phy-mode = "internal";
  92                         fixed-link {
  93                                 speed = <1000>;
  94                                 full-duplex;
  95                         };
  96                 };
  97         };
  98 };