target/linux/realtek/dts-5.10/rtl9302_zyxel_xgs1250-12.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /dts-v1/;
   3
   4 #include "rtl930x.dtsi"
   5
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/gpio/gpio.h>
   8 #include <dt-bindings/leds/common.h>
   9
  10 / {
  11         compatible = "zyxel,xgs1250-12", "realtek,rtl838x-soc";
  12         model = "Zyxel XGS1250-12 Switch";
  13
  14         aliases {
  15                 led-boot = &led_pwr_sys;
  16                 led-failsafe = &led_pwr_sys;
  17                 led-running = &led_pwr_sys;
  18                 led-upgrade = &led_pwr_sys;
  19         };
  20
  21         keys {
  22                 compatible = "gpio-keys";
  23
  24                 mode {
  25                         label = "reset";
  26                         gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
  27                         linux,code = <KEY_RESTART>;
  28                 };
  29         };
  30
  31         /* i2c of the SFP cage: port 12 */
  32         i2c0: i2c-rtl9300 {
  33                 compatible = "realtek,rtl9300-i2c";
  34                 reg = <0x1b00036c 0x3c>;
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37                 sda-pin = <10>;
  38                 scl-pin = <8>;
  39                 clock-frequency = <100000>;
  40         };
  41
  42         leds {
  43                 compatible = "gpio-leds";
  44
  45                 pinctrl-names = "default";
  46                 pinctrl-0 = <&pinmux_disable_sys_led>;
  47
  48                 led_pwr_sys: led-0 {
  49                         label = "green:power";
  50                         color = <LED_COLOR_ID_GREEN>;
  51                         function = LED_FUNCTION_POWER;
  52                         gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
  53                 };
  54         };
  55
  56         sfp0: sfp-p12 {
  57                 compatible = "sff,sfp";
  58                 i2c-bus = <&i2c0>;
  59                 los-gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>;
  60                 tx-fault-gpio = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  61                 mod-def0-gpio = <&gpio0 16 GPIO_ACTIVE_LOW>;
  62                 tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
  63         };
  64
  65         led_set: led_set@0 {
  66                 compatible = "realtek,rtl9300-leds";
  67                 led_set0 = <0x0000 0xffff 0x0a20 0x0b80>; // LED set 0: 1000Mbps,  10/100Mbps
  68                 led_set1 = <0x0a0b 0x0a28 0x0a82 0x0a0b>; // LED set 1: (10G, 5G, 2.5G) (2.5G, 1G)
  69                                                           // (5G, 10/100) (10G, 5G, 2.5G)
  70                 led_set2 = <0x0000 0xffff 0x0a20 0x0a01>; // LED set 2: 1000MBit, 10GBit
  71         };
  72 };
  73
  74 &spi0 {
  75         status = "okay";
  76         flash@0 {
  77                 compatible = "jedec,spi-nor";
  78                 reg = <0>;
  79                 spi-max-frequency = <10000000>;
  80
  81                 partitions {
  82                         compatible = "fixed-partitions";
  83                         #address-cells = <1>;
  84                         #size-cells = <1>;
  85
  86                         partition@0 {
  87                                 label = "u-boot";
  88                                 reg = <0x0 0xe0000>;
  89                                 read-only;
  90                         };
  91                         partition@e0000 {
  92                                 label = "u-boot-env";
  93                                 reg = <0xe0000 0x10000>;
  94                         };
  95                         partition@f0000 {
  96                                 label = "u-boot-env2";
  97                                 reg = <0xf0000 0x10000>;
  98                                 read-only;
  99                         };
 100                         partition@100000 {
 101                                 label = "jffs";
 102                                 reg = <0x100000 0x100000>;
 103                         };
 104                         partition@200000 {
 105                                 label = "jffs2";
 106                                 reg = <0x200000 0x100000>;
 107                         };
 108                         partition@b300000 {
 109                                 label = "firmware";
 110                                 reg = <0x300000 0xce0000>;
 111                                 compatible = "openwrt,uimage", "denx,uimage";
 112                                 openwrt,ih-magic = <0x93001250>;
 113                         };
 114                         partition@fe0000 {
 115                                 label = "log";
 116                                 reg = <0xfe0000 0x20000>;
 117                         };
 118                 };
 119         };
 120 };
 121
 122 &ethernet0 {
 123         mdio: mdio-bus {
 124                 compatible = "realtek,rtl838x-mdio";
 125                 regmap = <&ethernet0>;
 126                 #address-cells = <1>;
 127                 #size-cells = <0>;
 128
 129                 /* External RTL8218D PHY */
 130                 phy0: ethernet-phy@0 {
 131                         reg = <0>;
 132                         compatible = "ethernet-phy-ieee802.3-c22";
 133                         rtl9300,smi-address = <0 0>;
 134                         sds = < 2 >;
 135                         // Disabled because we do not know how to bring up again
 136                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 137                 };
 138                 phy1: ethernet-phy@1 {
 139                         reg = <1>;
 140                         compatible = "ethernet-phy-ieee802.3-c22";
 141                         rtl9300,smi-address = <0 1>;
 142                 };
 143                 phy2: ethernet-phy@2 {
 144                         reg = <2>;
 145                         compatible = "ethernet-phy-ieee802.3-c22";
 146                         rtl9300,smi-address = <0 2>;
 147                 };
 148                 phy3: ethernet-phy@3 {
 149                         reg = <3>;
 150                         compatible = "ethernet-phy-ieee802.3-c22";
 151                         rtl9300,smi-address = <0 3>;
 152                 };
 153                 phy4: ethernet-phy@4 {
 154                         reg = <4>;
 155                         compatible = "ethernet-phy-ieee802.3-c22";
 156                         rtl9300,smi-address = <0 4>;
 157                 };
 158                 phy5: ethernet-phy@5 {
 159                         reg = <5>;
 160                         compatible = "ethernet-phy-ieee802.3-c22";
 161                         rtl9300,smi-address = <0 5>;
 162                 };
 163                 phy6: ethernet-phy@6 {
 164                         reg = <6>;
 165                         compatible = "ethernet-phy-ieee802.3-c22";
 166                         rtl9300,smi-address = <0 6>;
 167                 };
 168                 phy7: ethernet-phy@7 {
 169                         reg = <7>;
 170                         compatible = "ethernet-phy-ieee802.3-c22";
 171                         rtl9300,smi-address = <0 7>;
 172                 };
 173
 174                 /* External Aquantia 113C PHYs */
 175                 phy24: ethernet-phy@24 {
 176                         reg = <24>;
 177                         compatible = "ethernet-phy-ieee802.3-c45";
 178                         rtl9300,smi-address = <1 8>;
 179                         sds = < 6 >;
 180                         // Disabled because we do not know how to bring up again
 181                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 182                 };
 183
 184                 phy25: ethernet-phy@25 {
 185                         reg = <25>;
 186                         compatible = "ethernet-phy-ieee802.3-c45";
 187                         rtl9300,smi-address = <2 8>;
 188                         sds = < 7 >;
 189                         // Disabled because we do not know how to bring up again
 190                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 191                 };
 192
 193                 phy26: ethernet-phy@26 {
 194                         reg = <26>;
 195                         compatible = "ethernet-phy-ieee802.3-c45";
 196                         rtl9300,smi-address = <3 8>;
 197                         sds = < 8 >;
 198                         // Disabled because we do not know how to bring up again
 199                         // reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
 200                 };
 201
 202                 /* SFP Ports */
 203                 phy27: ethernet-phy@27 {
 204                         compatible = "ethernet-phy-ieee802.3-c22";
 205                         phy-is-integrated;
 206                         reg = <27>;
 207                         rtl9300,smi-address = <4 0>;
 208                         sds = < 9 >;
 209                 };
 210
 211         };
 212 };
 213
 214 &switch0 {
 215         ports {
 216                 #address-cells = <1>;
 217                 #size-cells = <0>;
 218
 219                 port@0 {
 220                         reg = <0>;
 221                         label = "lan1";
 222                         phy-handle = <&phy0>;
 223                         phy-mode = "xgmii";
 224                         led-set = <0>;
 225                 };
 226                 port@1 {
 227                         reg = <1>;
 228                         label = "lan2";
 229                         phy-handle = <&phy1>;
 230                         phy-mode = "xgmii";
 231                         led-set = <0>;
 232                 };
 233                 port@2 {
 234                         reg = <2>;
 235                         label = "lan3";
 236                         phy-handle = <&phy2>;
 237                         phy-mode = "xgmii";
 238                         led-set = <0>;
 239                 };
 240                 port@3 {
 241                         reg = <3>;
 242                         label = "lan4";
 243                         phy-handle = <&phy3>;
 244                         phy-mode = "xgmii";
 245                         led-set = <0>;
 246                 };
 247                 port@4 {
 248                         reg = <4>;
 249                         label = "lan5";
 250                         phy-handle = <&phy4>;
 251                         phy-mode = "xgmii";
 252                         led-set = <0>;
 253                 };
 254                 port@5 {
 255                         reg = <5>;
 256                         label = "lan6";
 257                         phy-handle = <&phy5>;
 258                         phy-mode = "xgmii";
 259                         led-set = <0>;
 260                 };
 261                 port@6 {
 262                         reg = <6>;
 263                         label = "lan7";
 264                         phy-handle = <&phy6>;
 265                         phy-mode = "xgmii";
 266                         led-set = <0>;
 267                 };
 268                 port@7 {
 269                         reg = <7>;
 270                         label = "lan8";
 271                         phy-handle = <&phy7>;
 272                         phy-mode = "xgmii";
 273                         led-set = <0>;
 274                 };
 275
 276                 port@24 {
 277                         reg = <24>;
 278                         label = "lan9";
 279                         phy-mode = "usxgmii";
 280                         phy-handle = <&phy24>;
 281                         led-set = <1>;
 282                 };
 283                 port@25 {
 284                         reg = <25>;
 285                         label = "lan10";
 286                         phy-mode = "usxgmii";
 287                         phy-handle = <&phy25>;
 288                         led-set = <1>;
 289                 };
 290                 port@26 {
 291                         reg = <26>;
 292                         label = "lan11";
 293                         phy-mode = "usxgmii";
 294                         phy-handle = <&phy26>;
 295                         led-set = <1>;
 296                 };
 297
 298                 port@27 {
 299                         reg = <27>;
 300                         label = "lan12";
 301                         phy-mode = "10gbase-r";
 302                         phy-handle = <&phy27>;
 303                         sfp = <&sfp0>;
 304                         led-set = <2>;
 305
 306                         fixed-link {
 307                                 speed = <10000>;
 308                                 full-duplex;
 309                                 pause;
 310                         };
 311
 312                 };
 313
 314                 port@28 {
 315                         ethernet = <&ethernet0>;
 316                         reg = <28>;
 317                         phy-mode = "internal";
 318                         fixed-link {
 319                                 speed = <10000>;
 320                                 full-duplex;
 321                         };
 322                 };
 323         };
 324 };