ath25: switch default kernel to 5.15
[openwrt/openwrt.git] / target / linux / realtek / dts-5.10 / rtl8380_hpe_1920-8g.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "rtl838x.dtsi"
4 #include "rtl838x_hpe_1920.dtsi"
5
6 / {
7 compatible = "hpe,1920-8g", "realtek,rtl838x-soc";
8 model = "HPE 1920-8G (JG920A)";
9
10 gpio1: rtl8231-gpio {
11 compatible = "realtek,rtl8231-gpio";
12 #gpio-cells = <2>;
13 gpio-controller;
14 indirect-access-bus-id = <0>;
15 };
16
17 i2c0: i2c-gpio-0 {
18 compatible = "i2c-gpio";
19 sda-gpios = <&gpio1 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
20 scl-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
21 i2c-gpio,delay-us = <2>;
22 #address-cells = <1>;
23 #size-cells = <0>;
24 };
25
26 sfp0: sfp-0 {
27 compatible = "sff,sfp";
28 i2c-bus = <&i2c0>;
29 los-gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
30 mod-def0-gpio = <&gpio1 25 GPIO_ACTIVE_LOW>;
31 // tx-fault and tx-disable unconnected
32 };
33
34 i2c1: i2c-gpio-1 {
35 compatible = "i2c-gpio";
36 sda-gpios = <&gpio1 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
37 scl-gpios = <&gpio1 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
38 i2c-gpio,delay-us = <2>;
39 #address-cells = <1>;
40 #size-cells = <0>;
41 };
42
43 sfp1: sfp-1 {
44 compatible = "sff,sfp";
45 i2c-bus = <&i2c1>;
46 los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
47 mod-def0-gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
48 // tx-fault and tx-disable unconnected
49 };
50 };
51
52 &ethernet0 {
53 mdio: mdio-bus {
54 compatible = "realtek,rtl838x-mdio";
55 regmap = <&ethernet0>;
56 #address-cells = <1>;
57 #size-cells = <0>;
58
59 INTERNAL_PHY(8)
60 INTERNAL_PHY(9)
61 INTERNAL_PHY(10)
62 INTERNAL_PHY(11)
63 INTERNAL_PHY(12)
64 INTERNAL_PHY(13)
65 INTERNAL_PHY(14)
66 INTERNAL_PHY(15)
67
68 INTERNAL_PHY(24)
69 INTERNAL_PHY(26)
70 };
71 };
72
73 &switch0 {
74 ports {
75 #address-cells = <1>;
76 #size-cells = <0>;
77
78 SWITCH_PORT(8, 1, internal)
79 SWITCH_PORT(9, 2, internal)
80 SWITCH_PORT(10, 3, internal)
81 SWITCH_PORT(11, 4, internal)
82 SWITCH_PORT(12, 5, internal)
83 SWITCH_PORT(13, 6, internal)
84 SWITCH_PORT(14, 7, internal)
85 SWITCH_PORT(15, 8, internal)
86
87 port@24 {
88 reg = <24>;
89 label = "lan9";
90 phy-handle = <&phy24>;
91 phy-mode = "1000base-x";
92 managed = "in-band-status";
93 sfp = <&sfp0>;
94 };
95
96 port@26 {
97 reg = <26>;
98 label = "lan10";
99 phy-handle = <&phy26>;
100 phy-mode = "1000base-x";
101 managed = "in-band-status";
102 sfp = <&sfp1>;
103 };
104
105 port@28 {
106 ethernet = <&ethernet0>;
107 reg = <28>;
108 phy-mode = "internal";
109 fixed-link {
110 speed = <1000>;
111 full-duplex;
112 };
113 };
114 };
115 };