81cf233a1e0f5291c322df249bbb9fc9073a8752
[openwrt/openwrt.git] / target / linux / ramips / patches-4.3 / 0011-arch-mips-ralink-unify-soc-detection.patch
1 From 22ee5168a5dfeda748cabd0bbf728d6bdc6b925b Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Mon, 7 Dec 2015 17:12:38 +0100
4 Subject: [PATCH 11/53] arch: mips: ralink: unify soc detection
5
6 Signed-off-by: John Crispin <blogic@openwrt.org>
7 ---
8 arch/mips/include/asm/mach-ralink/mt7620.h | 8 --------
9 arch/mips/include/asm/mach-ralink/ralink_regs.h | 14 ++++++++++++++
10 arch/mips/include/asm/mach-ralink/rt305x.h | 21 ++++++---------------
11 arch/mips/ralink/prom.c | 5 ++++-
12 arch/mips/ralink/rt305x.c | 12 +++++-------
13 5 files changed, 29 insertions(+), 31 deletions(-)
14
15 --- a/arch/mips/include/asm/mach-ralink/mt7620.h
16 +++ b/arch/mips/include/asm/mach-ralink/mt7620.h
17 @@ -13,14 +13,6 @@
18 #ifndef _MT7620_REGS_H_
19 #define _MT7620_REGS_H_
20
21 -enum mt762x_soc_type {
22 - MT762X_SOC_UNKNOWN = 0,
23 - MT762X_SOC_MT7620A,
24 - MT762X_SOC_MT7620N,
25 - MT762X_SOC_MT7628AN,
26 -};
27 -extern enum mt762x_soc_type mt762x_soc;
28 -
29 #define MT7620_SYSC_BASE 0x10000000
30
31 #define SYSC_REG_CHIP_NAME0 0x00
32 --- a/arch/mips/include/asm/mach-ralink/ralink_regs.h
33 +++ b/arch/mips/include/asm/mach-ralink/ralink_regs.h
34 @@ -13,6 +13,20 @@
35 #ifndef _RALINK_REGS_H_
36 #define _RALINK_REGS_H_
37
38 +enum ralink_soc_type {
39 + RALINK_UNKNOWN = 0,
40 + RT305X_SOC_RT3050,
41 + RT305X_SOC_RT3052,
42 + RT305X_SOC_RT3350,
43 + RT305X_SOC_RT3352,
44 + RT305X_SOC_RT5350,
45 + MT762X_SOC_MT7620A,
46 + MT762X_SOC_MT7620N,
47 + MT762X_SOC_MT7621AT,
48 + MT762X_SOC_MT7628AN,
49 +};
50 +extern enum ralink_soc_type ralink_soc;
51 +
52 extern __iomem void *rt_sysc_membase;
53 extern __iomem void *rt_memc_membase;
54
55 --- a/arch/mips/include/asm/mach-ralink/rt305x.h
56 +++ b/arch/mips/include/asm/mach-ralink/rt305x.h
57 @@ -13,25 +13,16 @@
58 #ifndef _RT305X_REGS_H_
59 #define _RT305X_REGS_H_
60
61 -enum rt305x_soc_type {
62 - RT305X_SOC_UNKNOWN = 0,
63 - RT305X_SOC_RT3050,
64 - RT305X_SOC_RT3052,
65 - RT305X_SOC_RT3350,
66 - RT305X_SOC_RT3352,
67 - RT305X_SOC_RT5350,
68 -};
69 -
70 -extern enum rt305x_soc_type rt305x_soc;
71 +extern enum ralink_soc_type ralink_soc;
72
73 static inline int soc_is_rt3050(void)
74 {
75 - return rt305x_soc == RT305X_SOC_RT3050;
76 + return ralink_soc == RT305X_SOC_RT3050;
77 }
78
79 static inline int soc_is_rt3052(void)
80 {
81 - return rt305x_soc == RT305X_SOC_RT3052;
82 + return ralink_soc == RT305X_SOC_RT3052;
83 }
84
85 static inline int soc_is_rt305x(void)
86 @@ -41,17 +32,17 @@ static inline int soc_is_rt305x(void)
87
88 static inline int soc_is_rt3350(void)
89 {
90 - return rt305x_soc == RT305X_SOC_RT3350;
91 + return ralink_soc == RT305X_SOC_RT3350;
92 }
93
94 static inline int soc_is_rt3352(void)
95 {
96 - return rt305x_soc == RT305X_SOC_RT3352;
97 + return ralink_soc == RT305X_SOC_RT3352;
98 }
99
100 static inline int soc_is_rt5350(void)
101 {
102 - return rt305x_soc == RT305X_SOC_RT5350;
103 + return ralink_soc == RT305X_SOC_RT5350;
104 }
105
106 #define RT305X_SYSC_BASE 0x10000000
107 --- a/arch/mips/ralink/prom.c
108 +++ b/arch/mips/ralink/prom.c
109 @@ -15,10 +15,13 @@
110 #include <asm/bootinfo.h>
111 #include <asm/addrspace.h>
112
113 +#include <asm/mach-ralink/ralink_regs.h>
114 +
115 #include "common.h"
116
117 struct ralink_soc_info soc_info;
118 -struct rt2880_pmx_group *rt2880_pinmux_data = NULL;
119 +enum ralink_soc_type ralink_soc;
120 +EXPORT_SYMBOL_GPL(ralink_soc);
121
122 const char *get_system_type(void)
123 {
124 --- a/arch/mips/ralink/rt305x.c
125 +++ b/arch/mips/ralink/rt305x.c
126 @@ -21,8 +21,6 @@
127
128 #include "common.h"
129
130 -enum rt305x_soc_type rt305x_soc;
131 -
132 static struct rt2880_pmx_func i2c_func[] = { FUNC("i2c", 0, 1, 2) };
133 static struct rt2880_pmx_func spi_func[] = { FUNC("spi", 0, 3, 4) };
134 static struct rt2880_pmx_func uartf_func[] = {
135 @@ -236,24 +234,24 @@ void prom_soc_init(struct ralink_soc_inf
136
137 icache_sets = (read_c0_config1() >> 22) & 7;
138 if (icache_sets == 1) {
139 - rt305x_soc = RT305X_SOC_RT3050;
140 + ralink_soc = RT305X_SOC_RT3050;
141 name = "RT3050";
142 soc_info->compatible = "ralink,rt3050-soc";
143 } else {
144 - rt305x_soc = RT305X_SOC_RT3052;
145 + ralink_soc = RT305X_SOC_RT3052;
146 name = "RT3052";
147 soc_info->compatible = "ralink,rt3052-soc";
148 }
149 } else if (n0 == RT3350_CHIP_NAME0 && n1 == RT3350_CHIP_NAME1) {
150 - rt305x_soc = RT305X_SOC_RT3350;
151 + ralink_soc = RT305X_SOC_RT3350;
152 name = "RT3350";
153 soc_info->compatible = "ralink,rt3350-soc";
154 } else if (n0 == RT3352_CHIP_NAME0 && n1 == RT3352_CHIP_NAME1) {
155 - rt305x_soc = RT305X_SOC_RT3352;
156 + ralink_soc = RT305X_SOC_RT3352;
157 name = "RT3352";
158 soc_info->compatible = "ralink,rt3352-soc";
159 } else if (n0 == RT5350_CHIP_NAME0 && n1 == RT5350_CHIP_NAME1) {
160 - rt305x_soc = RT305X_SOC_RT5350;
161 + ralink_soc = RT305X_SOC_RT5350;
162 name = "RT5350";
163 soc_info->compatible = "ralink,rt5350-soc";
164 } else {