ramips: rt3883: add inital support for the DIR-645 board
[openwrt/openwrt.git] / target / linux / ramips / files / arch / mips / ralink / rt3883 / mach-dir-645.c
1 /*
2 * D-Link DIR-645 board support
3 *
4 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11 #include <linux/init.h>
12 #include <linux/platform_device.h>
13 #include <linux/rtl8367.h>
14 #include <linux/ethtool.h>
15 #include <linux/rt2x00_platform.h>
16 #include <linux/spi/spi.h>
17
18 #include <asm/mach-ralink/machine.h>
19 #include <asm/mach-ralink/dev-gpio-buttons.h>
20 #include <asm/mach-ralink/dev-gpio-leds.h>
21 #include <asm/mach-ralink/rt3883.h>
22 #include <asm/mach-ralink/rt3883_regs.h>
23 #include <asm/mach-ralink/ramips_eth_platform.h>
24
25 #include "devices.h"
26
27 #define DIR_645_GPIO_LED_INET 0
28 #define DIR_645_GPIO_LED_WPS 26
29
30 #define DIR_645_GPIO_BUTTON_RESET 9
31 #define DIR_645_GPIO_BUTTON_WPS 14
32
33 #define DIR_645_GPIO_USB_POWER 30
34
35 #define DIR_645_GPIO_RTL8367_SCK 2
36 #define DIR_645_GPIO_RTL8367_SDA 1
37
38 #define DIR_645_KEYS_POLL_INTERVAL 20
39 #define DIR_645_KEYS_DEBOUNCE_INTERVAL (3 * DIR_645_KEYS_POLL_INTERVAL)
40
41 static struct gpio_led dir_645_leds_gpio[] __initdata = {
42 {
43 .name = "d-link:green:inet",
44 .gpio = DIR_645_GPIO_LED_INET,
45 .active_low = 1,
46 },
47 {
48 .name = "d-link:green:wps",
49 .gpio = DIR_645_GPIO_LED_WPS,
50 .active_low = 1,
51 },
52 };
53
54 static struct gpio_keys_button dir_645_gpio_buttons[] __initdata = {
55 {
56 .desc = "reset",
57 .type = EV_KEY,
58 .code = KEY_RESTART,
59 .debounce_interval = DIR_645_KEYS_DEBOUNCE_INTERVAL,
60 .gpio = DIR_645_GPIO_BUTTON_RESET,
61 .active_low = 1,
62 },
63 {
64 .desc = "wps",
65 .type = EV_KEY,
66 .code = KEY_WPS_BUTTON,
67 .debounce_interval = DIR_645_KEYS_DEBOUNCE_INTERVAL,
68 .gpio = DIR_645_GPIO_BUTTON_WPS,
69 .active_low = 1,
70 }
71 };
72
73 static struct rtl8367_extif_config dir_645_rtl8367_extif1_cfg = {
74 .txdelay = 1,
75 .rxdelay = 0,
76 .mode = RTL8367_EXTIF_MODE_RGMII,
77 .ability = {
78 .force_mode = 1,
79 .txpause = 1,
80 .rxpause = 1,
81 .link = 1,
82 .duplex = 1,
83 .speed = RTL8367_PORT_SPEED_1000,
84 }
85 };
86
87 static struct rtl8367_platform_data dir_645_rtl8367_data = {
88 .gpio_sda = DIR_645_GPIO_RTL8367_SDA,
89 .gpio_sck = DIR_645_GPIO_RTL8367_SCK,
90 .extif1_cfg = &dir_645_rtl8367_extif1_cfg,
91 };
92
93 static struct platform_device dir_645_rtl8367_device = {
94 .name = RTL8367B_DRIVER_NAME,
95 .id = -1,
96 .dev = {
97 .platform_data = &dir_645_rtl8367_data,
98 }
99 };
100
101 static struct spi_board_info dir_645_spi_info[] = {
102 {
103 .bus_num = 0,
104 .chip_select = 0,
105 .max_speed_hz = 25000000,
106 .modalias = "m25p80",
107 }
108 };
109
110 static void __init dir_645_gpio_init(void)
111 {
112 rt3883_gpio_init(RT3883_GPIO_MODE_I2C |
113 RT3883_GPIO_MODE_UART0(RT3883_GPIO_MODE_GPIO) |
114 RT3883_GPIO_MODE_JTAG |
115 RT3883_GPIO_MODE_PCI(RT3883_GPIO_MODE_PCI_FNC));
116 }
117
118 static void __init dir_645_init(void)
119 {
120 dir_645_gpio_init();
121
122 rt3883_register_spi(dir_645_spi_info,
123 ARRAY_SIZE(dir_645_spi_info));
124
125 ramips_register_gpio_leds(-1, ARRAY_SIZE(dir_645_leds_gpio),
126 dir_645_leds_gpio);
127
128 ramips_register_gpio_buttons(-1, DIR_645_KEYS_POLL_INTERVAL,
129 ARRAY_SIZE(dir_645_gpio_buttons),
130 dir_645_gpio_buttons);
131
132 platform_device_register(&dir_645_rtl8367_device);
133
134 rt3883_wlan_data.disable_5ghz = 1;
135 rt3883_register_wlan();
136
137 rt3883_eth_data.speed = SPEED_1000;
138 rt3883_eth_data.duplex = DUPLEX_FULL;
139 rt3883_eth_data.tx_fc = 1;
140 rt3883_eth_data.rx_fc = 1;
141 rt3883_register_ethernet();
142
143 rt3883_register_wdt(false);
144 rt3883_register_usbhost();
145 }
146
147 MIPS_MACHINE(RAMIPS_MACH_DIR_645, "DIR-645", "D-Link DIR-645", dir_645_init);