target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9130-clearfog-pro.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright SolidRun Ltd.
   4  * Copyright (C) 2024 Tobias Schramm <tobias@t-sys.eu>
   5  *
   6  * Device tree for the CN9130-based ClearFog Pro
   7  */
   8
   9 #include "cn9130.dtsi"
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/input/input.h>
  13
  14 / {
  15         model = "SolidRun ClearFog Pro";
  16         compatible = "solidrun,clearfog-pro", "marvell,armada-ap807-quad",
  17                      "marvell,armada-ap807";
  18
  19         chosen {
  20                 stdout-path = "serial0:115200n8";
  21         };
  22
  23         aliases {
  24                 gpio1 = &cp0_gpio1;
  25                 gpio2 = &cp0_gpio2;
  26                 i2c0 = &cp0_i2c0;
  27                 ethernet0 = &cp0_eth0;
  28                 ethernet1 = &cp0_eth1;
  29                 ethernet2 = &cp0_eth2;
  30                 spi1 = &cp0_spi1;
  31         };
  32
  33         memory@00000000 {
  34                 reg = <0x0 0x0 0x1 0x0>;
  35                 device_type = "memory";
  36         };
  37
  38         /* Virtual regulator, root of power tree */
  39         vin: regulator-vin {
  40                 compatible = "regulator-fixed";
  41                 regulator-name = "vin";
  42                 regulator-always-on;
  43                 regulator-min-microvolt = <12000000>;
  44                 regulator-max-microvolt = <12000000>;
  45         };
  46
  47         /* Regulators supplied by vin */
  48         v_5v0: regulator-v_5v0 {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "v_5v0";
  51                 regulator-always-on;
  52                 regulator-min-microvolt = <5000000>;
  53                 regulator-max-microvolt = <5000000>;
  54                 vin-supply = <&vin>;
  55         };
  56
  57         v_3v3: regulator-v_3v3 {
  58                 compatible = "regulator-fixed";
  59                 regulator-name = "v_3v3";
  60                 regulator-always-on;
  61                 regulator-min-microvolt = <3300000>;
  62                 regulator-max-microvolt = <3300000>;
  63                 vin-supply = <&vin>;
  64         };
  65
  66         /* Regulators supplied by v_5v0 */
  67         v_1v8: regulator-v_1v8 {
  68                 compatible = "regulator-fixed";
  69                 regulator-name = "v_1v8";
  70                 regulator-always-on;
  71                 regulator-min-microvolt = <1800000>;
  72                 regulator-max-microvolt = <1800000>;
  73                 vin-supply = <&v_5v0>;
  74         };
  75
  76         v_5v0_usb3_hst_vbus: regulator-v_5v0_usb3_hst_vbus {
  77                 compatible = "regulator-fixed";
  78                 regulator-name = "v_5v0_usb3_hst_vbus";
  79                 regulator-min-microvolt = <5000000>;
  80                 regulator-max-microvolt = <5000000>;
  81                 gpio = <&expander0 6 GPIO_ACTIVE_LOW>;
  82                 vin-supply = <&v_5v0>;
  83         };
  84
  85         /* Regulators internal to SOM */
  86         vqmmc: regulator-vqmmc {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "vqmmc";
  89                 regulator-always-on;
  90                 regulator-min-microvolt = <1800000>;
  91                 regulator-max-microvolt = <1800000>;
  92                 vin-supply = <&v_5v0>;
  93         };
  94
  95         cp0_usb3_0_phy1: cp0_usb3_phy@1 {
  96                 compatible = "usb-nop-xceiv";
  97                 vbus-supply = <&v_5v0_usb3_hst_vbus>;
  98         };
  99
 100         cp0_sfp_eth0: sfp-eth@0 {
 101                 compatible = "sff,sfp";
 102                 i2c-bus = <&cp0_i2c1>;
 103                 los-gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
 104                 mod-def0-gpio = <&expander0 15 GPIO_ACTIVE_LOW>;
 105                 tx-disable-gpio = <&expander0 14 GPIO_ACTIVE_HIGH>;
 106                 tx-fault-gpio = <&expander0 13 GPIO_ACTIVE_HIGH>;
 107                 maximum-power-milliwatt = <2000>;
 108         };
 109
 110         keys {
 111                 compatible = "gpio-keys";
 112                 pinctrl-names = "default";
 113                 pinctrl-0 = <&cp0_button_pin>;
 114
 115                 reset {
 116                         label = "Reset";
 117                         linux,code = <KEY_RESTART>;
 118                         gpios = <&cp0_gpio2 0 GPIO_ACTIVE_LOW>;
 119                 };
 120         };
 121 };
 122
 123 &uart0 {
 124         status = "okay";
 125 };
 126
 127 /* on-board eMMC  */
 128 &ap_sdhci0 {
 129         bus-width = <8>;
 130         pinctrl-names = "default";
 131         vqmmc-supply = <&vqmmc>;
 132         status = "okay";
 133 };
 134
 135 &cp0_crypto {
 136         status = "okay";
 137 };
 138
 139 &cp0_ethernet {
 140         status = "okay";
 141 };
 142
 143 &cp0_gpio1 {
 144         status = "okay";
 145 };
 146
 147 &cp0_gpio2 {
 148         status = "okay";
 149 };
 150
 151 &cp0_i2c0 {
 152         status = "okay";
 153         pinctrl-names = "default";
 154         pinctrl-0 = <&cp0_i2c0_pins>;
 155         clock-frequency = <100000>;
 156
 157         /*
 158          * PCA9655 GPIO expander, up to 1MHz clock.
 159          *  0-CON3 CLKREQ#
 160          *  1-CON3 PERST#
 161          *  2-CON2 PERST#
 162          *  3-CON3 W_DISABLE
 163          *  4-CON2 CLKREQ#
 164          *  5-USB3 overcurrent
 165          *  6-USB3 power
 166          *  7-CON2 W_DISABLE
 167          *  8-JP4 P1
 168          *  9-JP4 P4
 169          * 10-JP4 P5
 170          * 11-m.2 DEVSLP
 171          * 12-SFP_LOS
 172          * 13-SFP_TX_FAULT
 173          * 14-SFP_TX_DISABLE
 174          * 15-SFP_MOD_DEF0
 175          */
 176         expander0: gpio-expander@20 {
 177                 compatible = "nxp,pca9555";
 178                 reg = <0x20>;
 179                 gpio-controller;
 180                 #gpio-cells = <2>;
 181                 interrupt-controller;
 182                 #interrupt-cells = <2>;
 183                 interrupt-parent = <&cp0_gpio1>;
 184                 interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
 185                 pinctrl-names = "default";
 186                 pinctrl-0 = <&cp0_expander0_pins>;
 187                 vcc-supply = <&v_3v3>;
 188
 189                 pcie1_0_clkreq {
 190                         gpio-hog;
 191                         gpios = <0 GPIO_ACTIVE_LOW>;
 192                         input;
 193                         line-name = "pcie1.0-clkreq";
 194                 };
 195
 196                 pcie1_0_w_disable {
 197                         gpio-hog;
 198                         gpios = <3 GPIO_ACTIVE_LOW>;
 199                         output-low;
 200                         line-name = "pcie1.0-w-disable";
 201                 };
 202
 203                 pcie2_0_clkreq {
 204                         gpio-hog;
 205                         gpios = <4 GPIO_ACTIVE_LOW>;
 206                         input;
 207                         line-name = "pcie2.0-clkreq";
 208                 };
 209
 210                 pcie2_0_w_disable {
 211                         gpio-hog;
 212                         gpios = <7 GPIO_ACTIVE_LOW>;
 213                         output-low;
 214                         line-name = "pcie2.0-w-disable";
 215                 };
 216
 217                 usb3_ilimit {
 218                         gpio-hog;
 219                         gpios = <5 GPIO_ACTIVE_LOW>;
 220                         input;
 221                         line-name = "usb3-current-limit";
 222                 };
 223
 224                 m2_devslp {
 225                         gpio-hog;
 226                         gpios = <11 GPIO_ACTIVE_HIGH>;
 227                         output-low;
 228                         line-name = "m.2 devslp";
 229                 };
 230         };
 231
 232         /* ADC only for mikroBUS connector */
 233         mcp3021@4c {
 234                 compatible = "microchip,mcp3021";
 235                 reg = <0x4c>;
 236         };
 237
 238         /* EEPROM on the SOM */
 239         eeprom@53 {
 240                 compatible = "atmel,24c02";
 241                 reg = <0x53>;
 242                 pagesize = <16>;
 243                 read-only;
 244
 245                 nvmem-layout {
 246                         compatible = "onie,tlv-layout";
 247
 248                         onie_tlv_macaddr: mac-address {
 249                                 #nvmem-cell-cells = <1>;
 250                         };
 251                 };
 252         };
 253 };
 254
 255 /* SMBUS on mini PCIe sockets */
 256 &cp0_i2c1 {
 257         status = "okay";
 258         pinctrl-names = "default";
 259         pinctrl-0 = <&cp0_i2c1_pins>;
 260         clock-frequency = <100000>;
 261 };
 262
 263 &cp0_mdio {
 264         status = "okay";
 265
 266         phy0: ethernet-phy@0 {
 267                 reg = <0>;
 268                 /* Green led blinks on activity, orange LED on link */
 269                 marvell,reg-init = <3 16 0 0x0064>;
 270         };
 271
 272         switch@4 {
 273                 compatible = "marvell,mv88e6085";
 274                 reg = <4>;
 275                 interrupt-controller;
 276                 #interrupt-cells = <2>;
 277                 interrupt-parent = <&cp0_gpio1>;
 278                 interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
 279                 pinctrl-names = "default";
 280                 pinctrl-0 = <&cp0_dsa0_pins>;
 281                 reset-gpios = <&cp0_gpio1 27 GPIO_ACTIVE_LOW>;
 282
 283                 mdio-external {
 284                         compatible = "marvell,mv88e6xxx-mdio-external";
 285                         #address-cells = <1>;
 286                         #size-cells = <0>;
 287
 288                         /* 88E1512 PHY */
 289                         port6_phy: ethernet-phy@1 {
 290                                 reg = <1>;
 291                         };
 292                 };
 293
 294                 ports {
 295                         #address-cells = <1>;
 296                         #size-cells = <0>;
 297
 298                         port@0 {
 299                                 reg = <0>;
 300                                 label = "lan5";
 301                         };
 302
 303                         port@1 {
 304                                 reg = <1>;
 305                                 label = "lan4";
 306                         };
 307
 308                         port@2 {
 309                                 reg = <2>;
 310                                 label = "lan3";
 311                         };
 312
 313                         port@3 {
 314                                 reg = <3>;
 315                                 label = "lan2";
 316                         };
 317
 318                         port@4 {
 319                                 reg = <4>;
 320                                 label = "lan1";
 321                         };
 322
 323                         port@5 {
 324                                 reg = <5>;
 325                                 ethernet = <&cp0_eth1>;
 326                                 label = "cpu";
 327                                 phy-mode = "rgmii-id";
 328
 329                                 fixed-link {
 330                                         speed = <1000>;
 331                                         full-duplex;
 332                                 };
 333                         };
 334
 335                         port@6 {
 336                                 /* 88E1512 external phy */
 337                                 reg = <6>;
 338                                 label = "lan6";
 339                                 phy-handle = <&port6_phy>;
 340                                 phy-mode = "rgmii-id";
 341                         };
 342                 };
 343         };
 344 };
 345
 346 /* SRDS #0 - SATA on bottom M.2 B-Key connector */
 347 &cp0_sata0 {
 348         status = "okay";
 349
 350         sata-port@0 {
 351                 status = "disabled";
 352         };
 353
 354         sata-port@1 {
 355                 phys = <&cp0_comphy0 1>;
 356                 target-supply = <&v_3v3>;
 357         };
 358 };
 359
 360 &cp0_utmi {
 361         status = "okay";
 362 };
 363
 364 /* mini PCIe slot far from SOM, USB 2.0 only, SS lanes unused */
 365 &cp0_usb3_0 {
 366         status = "okay";
 367         phys = <&cp0_utmi0>;
 368         phy-names = "utmi";
 369         dr_mode = "host";
 370 };
 371
 372 /* SRDS #1 - USB-A 3.0 host port */
 373 &cp0_usb3_1 {
 374         status = "okay";
 375         phys = <&cp0_utmi1>, <&cp0_comphy1 0>;
 376         phy-names = "utmi", "usb";
 377         usb-phy = <&cp0_usb3_0_phy1>;
 378         dr_mode = "host";
 379 };
 380
 381 /* SRDS #2 - SFP+ 10GE */
 382 &cp0_eth0 {
 383         status = "okay";
 384         phy-mode = "10gbase-r";
 385         phys = <&cp0_comphy2 0>;
 386         managed = "in-band-status";
 387         nvmem-cells = <&onie_tlv_macaddr 0>;
 388         nvmem-cell-names = "mac-address";
 389         sfp = <&cp0_sfp_eth0>;
 390 };
 391
 392 /* SRDS #3 - SGMII 1GE to L2 switch */
 393 &cp0_eth1 {
 394         status = "okay";
 395         phys = <&cp0_comphy3 1>;
 396         phy-mode = "sgmii";
 397         nvmem-cells = <&onie_tlv_macaddr 1>;
 398         nvmem-cell-names = "mac-address";
 399
 400         fixed-link {
 401                 speed = <1000>;
 402                 full-duplex;
 403         };
 404 };
 405
 406 /* SRDS #4 - mini PCIe slot near SOM */
 407 &cp0_pcie1 {
 408         status = "okay";
 409         phys = <&cp0_comphy4 1>;
 410         num-lanes = <1>;
 411         reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
 412 };
 413
 414 /* SRDS #5 - mini PCIe slot far from SOM */
 415 &cp0_pcie2 {
 416         status = "okay";
 417         phys = <&cp0_comphy5 2>;
 418         num-lanes = <1>;
 419         reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
 420 };
 421
 422 /* GE PHY RGMII */
 423 &cp0_eth2 {
 424         status = "okay";
 425         pinctrl-names = "default";
 426         pinctrl-0 = <&cp0_ge2_rgmii_pins>;
 427         phy = <&phy0>;
 428         phy-mode = "rgmii-id";
 429         nvmem-cells = <&onie_tlv_macaddr 2>;
 430         nvmem-cell-names = "mac-address";
 431 };
 432
 433 /* micro SD card slot */
 434 &cp0_sdhci0 {
 435         status = "okay";
 436         pinctrl-names = "default";
 437         pinctrl-0 = <&cp0_sdhci_pins &cp0_sdhci_cd_pins>;
 438         bus-width = <4>;
 439         cd-gpios = <&cp0_gpio2 11 GPIO_ACTIVE_LOW>;
 440         no-1-8-v;
 441         vqmmc-supply = <&v_3v3>;
 442         vmmc-supply = <&v_3v3>;
 443 };
 444
 445 &cp0_spi1 {
 446         status = "okay";
 447         pinctrl-names = "default";
 448         pinctrl-0 = <&cp0_spi1_pins>;
 449
 450         spi-flash@0 {
 451                 compatible = "jedec,spi-nor";
 452                 reg = <0x0>;
 453                 #address-cells = <0x1>;
 454                 #size-cells = <0x1>;
 455                 spi-max-frequency = <10000000>;
 456         };
 457 };
 458
 459 &cp0_syscon0 {
 460         cp0_pinctrl: pinctrl {
 461                 compatible = "marvell,cp115-standalone-pinctrl";
 462
 463                 cp0_i2c0_pins: cp0-i2c0-pins {
 464                         marvell,pins = "mpp37", "mpp38";
 465                         marvell,function = "i2c0";
 466                 };
 467
 468                 cp0_i2c1_pins: cp0-i2c1-pins {
 469                         marvell,pins = "mpp35", "mpp36";
 470                         marvell,function = "i2c1";
 471                 };
 472
 473                 cp0_ge2_rgmii_pins: cp0-ge2-rgmii-pins {
 474                         marvell,pins = "mpp44", "mpp45", "mpp46",
 475                                        "mpp47", "mpp48", "mpp49",
 476                                        "mpp50", "mpp51", "mpp52",
 477                                        "mpp53", "mpp54", "mpp55";
 478                         marvell,function = "ge1";
 479                 };
 480
 481                 cp0_sdhci_cd_pins: cp0-sdhci-cd-pins {
 482                         marvell,pins = "mpp43";
 483                         marvell,function = "sdio";
 484                 };
 485
 486                 cp0_sdhci_pins: cp0-sdhci-pins {
 487                         marvell,pins = "mpp56", "mpp57", "mpp58",
 488                                        "mpp59", "mpp60", "mpp61";
 489                         marvell,function = "sdio";
 490                 };
 491
 492                 cp0_spi1_pins: cp0-spi1-pins {
 493                         marvell,pins = "mpp12", "mpp13", "mpp14",
 494                                        "mpp15", "mpp16";
 495                         marvell,function = "spi1";
 496                 };
 497
 498                 cp0_dsa0_pins: cp0-dsa0-pins {
 499                         marvell,pins = "mpp27", "mpp29";
 500                         marvell,function = "gpio";
 501                 };
 502
 503                 cp0_button_pin: cp0-button-pin {
 504                         marvell,pins = "mpp32";
 505                         marvell,function = "gpio";
 506                 };
 507
 508                 cp0_expander0_pins: cp0-expander0-pins {
 509                         marvell,pins = "mpp4";
 510                         marvell,function = "gpio";
 511                 };
 512         };
 513 };