unetd: fix PKG_MIRROR_HASH
[openwrt/openwrt.git] / target / linux / mvebu / files / arch / arm64 / boot / dts / marvell / armada-3720-espressobin-ultra.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Device Tree file for ESPRESSObin-Ultra
4 * Copyright (C) 2019 Globalscale technologies, Inc.
5 *
6 * Jason Hung <jhung@globalscaletechnologies.com>
7 */
8
9 /dts-v1/;
10
11 #include <dt-bindings/gpio/gpio.h>
12 #include "armada-372x.dtsi"
13
14 / {
15 model = "Globalscale Marvell ESPRESSOBin Ultra Board";
16 compatible = "globalscale,espressobin-ultra", "marvell,armada3720",
17 "marvell,armada3710";
18
19 aliases {
20 /* for dsa slave device */
21 ethernet1 = &switch0port1;
22 ethernet2 = &switch0port2;
23 ethernet3 = &switch0port3;
24 ethernet4 = &switch0port4;
25 ethernet5 = &switch0port5;
26 };
27
28 chosen {
29 stdout-path = "serial0:115200n8";
30 };
31
32 memory@0 {
33 device_type = "memory";
34 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
35 };
36
37 reg_usb3_vbus: usb3-vbus {
38 compatible = "regulator-fixed";
39 regulator-name = "usb3-vbus";
40 regulator-min-microvolt = <5000000>;
41 regulator-max-microvolt = <5000000>;
42 enable-active-high;
43 gpio = <&gpionb 19 GPIO_ACTIVE_HIGH>;
44 };
45
46 usb3_phy: usb3-phy {
47 compatible = "usb-nop-xceiv";
48 vcc-supply = <&reg_usb3_vbus>;
49 };
50
51 leds {
52 pinctrl-names = "default";
53 compatible = "gpio-leds";
54 /* No assigned functions to the LEDs by default */
55 led1 {
56 label = "ebin-ultra:blue:led1";
57 gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
58 };
59 led2 {
60 label = "ebin-ultra:green:led2";
61 gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
62 };
63 led3 {
64 label = "ebin-ultra:red:led3";
65 gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
66 };
67 led4 {
68 label = "ebin-ultra:yellow:led4";
69 gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
70 };
71 };
72 };
73
74 &pcie0 {
75 status = "okay";
76 };
77
78 &sata {
79 status = "okay";
80 };
81
82 &sdhci0 {
83 status = "okay";
84 non-removable;
85 bus-width = <8>;
86 mmc-ddr-1_8v;
87 mmc-hs400-1_8v;
88 marvell,pad-type = "fixed-1-8v";
89 };
90
91 &spi0 {
92 status = "okay";
93 pinctrl-names = "default";
94 pinctrl-0 = <&spi_quad_pins>;
95
96 flash@0 {
97 compatible = "jedec,spi-nor";
98 reg = <0>;
99 spi-max-frequency = <108000000>;
100 spi-rx-bus-width = <4>;
101 spi-tx-bus-width = <4>;
102 m25p,fast-read;
103
104 partitions {
105 compatible = "fixed-partitions";
106 #address-cells = <1>;
107 #size-cells = <1>;
108
109 partition@0 {
110 label = "firmware";
111 reg = <0x0 0x3e0000>;
112 };
113 partition@3e0000 {
114 label = "hw-info";
115 reg = <0x3e0000 0x10000>;
116 read-only;
117 };
118 partition@3f0000 {
119 label = "u-boot-env";
120 reg = <0x3f0000 0x10000>;
121 };
122 };
123 };
124 };
125
126 &uart0 {
127 status = "okay";
128 pinctrl-names = "default";
129 pinctrl-0 = <&uart1_pins>;
130 };
131
132 &i2c0 {
133 status = "okay";
134 pinctrl-names = "default";
135 pinctrl-0 = <&i2c1_pins>;
136
137 clock-frequency = <100000>;
138
139 rtc@51 {
140 compatible = "nxp,pcf8563";
141 reg = <0x51>;
142 };
143 };
144
145 &usb3 {
146 status = "okay";
147 usb-phy = <&usb3_phy>;
148 };
149
150 &usb2 {
151 status = "okay";
152 };
153
154 &eth0 {
155 status = "okay";
156 pinctrl-names = "default";
157 pinctrl-0 = <&rgmii_pins>;
158 phy-mode = "rgmii-id";
159
160 fixed-link {
161 speed = <1000>;
162 full-duplex;
163 };
164 };
165
166 &mdio {
167 status = "okay";
168
169 extphy: ethernet-phy@0 {
170 reg = <1>;
171 };
172
173 switch0: switch0@1 {
174 compatible = "marvell,mv88e6085";
175 #address-cells = <1>;
176 #size-cells = <0>;
177 reg = <3>;
178
179 dsa,member = <0 0>;
180
181 ports {
182 #address-cells = <1>;
183 #size-cells = <0>;
184
185 switch0port0: port@0 {
186 reg = <0>;
187 ethernet = <&eth0>;
188 };
189
190 switch0port1: port@1 {
191 reg = <1>;
192 label = "lan0";
193 phy-handle = <&switch0phy1>;
194 };
195
196 switch0port2: port@2 {
197 reg = <2>;
198 label = "lan1";
199 phy-handle = <&switch0phy2>;
200 };
201
202 switch0port3: port@3 {
203 reg = <3>;
204 label = "lan2";
205 phy-handle = <&switch0phy3>;
206 };
207
208 switch0port4: port@4 {
209 reg = <4>;
210 label = "lan3";
211 phy-handle = <&switch0phy4>;
212 };
213
214 switch0port5: port@5 {
215 reg = <5>;
216 label = "wan";
217 phy-handle = <&extphy>;
218 phy-mode = "sgmii";
219 };
220 };
221
222 mdio {
223 #address-cells = <1>;
224 #size-cells = <0>;
225
226 switch0phy1: switch0phy1@11 {
227 reg = <0x11>;
228 };
229 switch0phy2: switch0phy2@12 {
230 reg = <0x12>;
231 };
232 switch0phy3: switch0phy3@13 {
233 reg = <0x13>;
234 };
235 switch0phy4: switch0phy4@14 {
236 reg = <0x14>;
237 };
238 };
239 };
240 };