dba215de3efabdf206cfc4e743734e594c673469
[openwrt/openwrt.git] / target / linux / mvebu / files / arch / arm / boot / dts / armada-385-fortinet-fg-50e.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 /dts-v1/;
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8 #include "armada-385.dtsi"
9
10 / {
11 model = "Fortinet FortiGate 50E";
12 compatible = "fortinet,fg-50e", "marvell,armada385", "marvell,armada380";
13
14 aliases {
15 led-boot = &led_status_green;
16 led-failsafe = &led_status_red;
17 led-running = &led_status_green;
18 led-upgrade = &led_status_green;
19 label-mac-device = &eth0;
20 };
21
22 chosen {
23 stdout-path = "serial0:9600n8";
24 };
25
26 memory@0 {
27 device_type = "memory";
28 reg = <0x00000000 0x80000000>; /* 2GB */
29 };
30
31 soc {
32 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
33 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
34 MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
35 MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
36 MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
37 };
38
39 gpio-keys {
40 compatible = "gpio-keys";
41 pinctrl-names = "default";
42 pinctrl-0 = <&pmx_gpio_keys_pins>;
43
44 reset {
45 label = "reset";
46 linux,code = <KEY_RESTART>;
47 gpios = <&gpio1 22 GPIO_ACTIVE_LOW>;
48 };
49 };
50
51 gpio-leds {
52 compatible = "gpio-leds";
53 pinctrl-names = "default";
54 pinctrl-0 = <&pmx_gpio_leds_pins>;
55
56 led-0 {
57 label = "red:alarm";
58 gpios = <&gpio0 30 GPIO_ACTIVE_LOW>;
59 color = <LED_COLOR_ID_RED>;
60 function = LED_FUNCTION_ALARM;
61 };
62
63 led-1 {
64 label = "red:ha";
65 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
66 color = <LED_COLOR_ID_RED>;
67 };
68
69 led_status_green: led-2 {
70 label = "green:sta";
71 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
72 color = <LED_COLOR_ID_GREEN>;
73 function = LED_FUNCTION_STATUS;
74 };
75
76 led-3 {
77 label = "green:ha";
78 gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
79 color = <LED_COLOR_ID_GREEN>;
80 };
81
82 led-4 {
83 label = "amber:alarm";
84 gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
85 color = <LED_COLOR_ID_AMBER>;
86 function = LED_FUNCTION_ALARM;
87 };
88
89 led_status_red: led-5 {
90 label = "red:sta";
91 gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
92 color = <LED_COLOR_ID_RED>;
93 function = LED_FUNCTION_STATUS;
94 };
95
96 led-6 {
97 label = "green:speed_wan1";
98 gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
99 color = <LED_COLOR_ID_GREEN>;
100 linux,default-trigger = "f1072004.mdio-mii:00:1Gbps";
101 };
102
103 led-7 {
104 label = "green:speed_wan2";
105 gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
106 color = <LED_COLOR_ID_GREEN>;
107 linux,default-trigger = "f1072004.mdio-mii:01:1Gbps";
108 };
109
110 led-8 {
111 label = "amber:speed_lan5";
112 gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
113 color = <LED_COLOR_ID_AMBER>;
114 linux,default-trigger = "mv88e6xxx-1:00:100Mbps";
115 };
116
117 led-9 {
118 label = "green:speed_lan5";
119 gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
120 color = <LED_COLOR_ID_GREEN>;
121 linux,default-trigger = "mv88e6xxx-1:00:1Gbps";
122 };
123
124 led-10 {
125 label = "green:speed_lan4";
126 gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
127 color = <LED_COLOR_ID_GREEN>;
128 linux,default-trigger = "mv88e6xxx-1:01:1Gbps";
129 };
130
131 led-11 {
132 label = "amber:speed_lan4";
133 gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
134 color = <LED_COLOR_ID_AMBER>;
135 linux,default-trigger = "mv88e6xxx-1:01:100Mbps";
136 };
137
138 led-12 {
139 label = "amber:speed_lan3";
140 gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
141 color = <LED_COLOR_ID_AMBER>;
142 linux,default-trigger = "mv88e6xxx-1:02:100Mbps";
143 };
144
145 led-13 {
146 label = "green:speed_lan3";
147 gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
148 color = <LED_COLOR_ID_GREEN>;
149 linux,default-trigger = "mv88e6xxx-1:02:1Gbps";
150 };
151
152 led-14 {
153 label = "green:speed_lan1";
154 gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
155 color = <LED_COLOR_ID_GREEN>;
156 linux,default-trigger = "mv88e6xxx-1:04:1Gbps";
157 };
158
159 led-15 {
160 label = "amber:speed_lan1";
161 gpios = <&gpio2 13 GPIO_ACTIVE_LOW>;
162 color = <LED_COLOR_ID_AMBER>;
163 linux,default-trigger = "mv88e6xxx-1:04:100Mbps";
164 };
165
166 led-16 {
167 label = "green:speed_lan2";
168 gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
169 color = <LED_COLOR_ID_GREEN>;
170 linux,default-trigger = "mv88e6xxx-1:03:1Gbps";
171 };
172
173 led-17 {
174 label = "amber:speed_lan2";
175 gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
176 color = <LED_COLOR_ID_AMBER>;
177 linux,default-trigger = "mv88e6xxx-1:03:100Mbps";
178 };
179 };
180
181 reg_usb_vbus: regulator-usb-vbus {
182 compatible = "fixed-regulator";
183 regulator-name = "usb-vbus";
184 regulator-min-microvolt = <5000000>;
185 regulator-max-microvolt = <5000000>;
186 gpio = <&gpio1 21 GPIO_ACTIVE_LOW>;
187 regulator-always-on;
188 };
189 };
190
191 &i2c0 {
192 pinctrl-names = "default";
193 pinctrl-0 = <&i2c0_pins>;
194 status = "okay";
195
196 gpio2: gpio@24 {
197 compatible = "nxp,pca9555";
198 reg = <0x24>;
199 gpio-controller;
200 #gpio-cells = <0x2>;
201 };
202
203 hwmon@28 {
204 compatible = "nuvoton,nct7802";
205 reg = <0x28>;
206 };
207 };
208
209 &uart0 {
210 pinctrl-names = "default";
211 pinctrl-0 = <&uart0_pins>;
212 status = "okay";
213 };
214
215 &pinctrl {
216 pmx_phy_switch_pins: phy-switch-pins {
217 marvell,pins = "mpp19", "mpp20", "mpp23", "mpp34", "mpp41";
218 marvell,function = "gpio";
219 };
220
221 pmx_gpio_leds_pins: gpio-leds-pins {
222 marvell,pins = "mpp30", "mpp32", "mpp33", "mpp35",
223 "mpp45", "mpp47";
224 marvell,function = "gpio";
225 };
226
227 pmx_usb_pins: usb-pins {
228 marvell,pins = "mpp53";
229 marvell,function = "gpio";
230 };
231
232 pmx_gpio_keys_pins: gpio-keys-pins {
233 marvell,pins = "mpp54";
234 marvell,function = "gpio";
235 };
236 };
237
238 &bm {
239 status = "okay";
240 };
241
242 &bm_bppi {
243 status = "okay";
244 };
245
246 &eth0 {
247 pinctrl-names = "default";
248 pinctrl-0 = <&ge0_rgmii_pins>;
249 status = "okay";
250
251 phy-connection-type = "rgmii-id";
252 buffer-manager = <&bm>;
253 bm,pool-long = <0>;
254 bm,pool-short = <1>;
255 nvmem-cells = <&macaddr_bdinfo_d880>;
256 nvmem-cell-names = "mac-address";
257
258 fixed-link {
259 speed = <1000>;
260 full-duplex;
261 };
262 };
263
264 &eth1 {
265 status = "okay";
266
267 phy-handle = <&ethphy0>;
268 phy-connection-type = "sgmii";
269 buffer-manager = <&bm>;
270 bm,pool-long = <2>;
271 nvmem-cells = <&macaddr_bdinfo_d880>;
272 nvmem-cell-names = "mac-address";
273 mac-address-increment = <1>;
274 };
275
276 &eth2 {
277 status = "okay";
278
279 phy-handle = <&ethphy1>;
280 phy-connection-type = "sgmii";
281 buffer-manager = <&bm>;
282 bm,pool-long = <3>;
283 nvmem-cells = <&macaddr_bdinfo_d880>;
284 nvmem-cell-names = "mac-address";
285 mac-address-increment = <2>;
286 };
287
288 &mdio {
289 pinctrl-names = "default";
290 pinctrl-0 = <&mdio_pins>, <&pmx_phy_switch_pins>;
291
292 /* Marvell 88E1512 */
293 ethphy0: ethernet-phy@0 {
294 compatible = "ethernet-phy-id0141,0dd1",
295 "ethernet-phy-ieee802.3-c22";
296 reg = <0>;
297 interrupt-parent = <&gpio0>;
298 interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
299 reset-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
300 reset-assert-us = <10000>;
301 reset-deassert-us = <10000>;
302 /*
303 * LINK/ACT (Green): LED[0], Active Low
304 * SPEED 100M (Amber): LED[1], Active High
305 */
306 marvell,reg-init = <3 16 0 0x71>,
307 <3 17 0 0x4>;
308 };
309
310 /* Marvell 88E1512 */
311 ethphy1: ethernet-phy@1 {
312 compatible = "ethernet-phy-id0141,0dd1",
313 "ethernet-phy-ieee802.3-c22";
314 reg = <1>;
315 interrupt-parent = <&gpio1>;
316 interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
317 reset-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
318 reset-assert-us = <10000>;
319 reset-deassert-us = <10000>;
320 /*
321 * LINK/ACT (Green): LED[0], Active Low
322 * SPEED 100M (Amber): LED[1], Active High
323 */
324 marvell,reg-init = <3 16 0 0x71>,
325 <3 17 0 0x4>;
326 };
327
328 /* Marvell 88E6176 */
329 switch@2 {
330 compatible = "marvell,mv88e6085";
331 reg = <0x2>;
332 reset-gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
333
334 ports {
335 #address-cells = <1>;
336 #size-cells = <0>;
337
338 port@0 {
339 reg = <0>;
340 label = "lan5";
341 nvmem-cells = <&macaddr_bdinfo_d880>;
342 nvmem-cell-names = "mac-address";
343 mac-address-increment = <7>;
344 };
345
346 port@1 {
347 reg = <1>;
348 label = "lan4";
349 nvmem-cells = <&macaddr_bdinfo_d880>;
350 nvmem-cell-names = "mac-address";
351 mac-address-increment = <6>;
352 };
353
354 port@2 {
355 reg = <2>;
356 label = "lan3";
357 nvmem-cells = <&macaddr_bdinfo_d880>;
358 nvmem-cell-names = "mac-address";
359 mac-address-increment = <5>;
360 };
361
362 port@3 {
363 reg = <3>;
364 label = "lan2";
365 nvmem-cells = <&macaddr_bdinfo_d880>;
366 nvmem-cell-names = "mac-address";
367 mac-address-increment = <4>;
368 };
369
370 port@4 {
371 reg = <4>;
372 label = "lan1";
373 nvmem-cells = <&macaddr_bdinfo_d880>;
374 nvmem-cell-names = "mac-address";
375 mac-address-increment = <3>;
376 };
377
378 port@6 {
379 reg = <6>;
380 ethernet = <&eth0>;
381 phy-connection-type = "rgmii-id";
382
383 fixed-link {
384 speed = <1000>;
385 full-duplex;
386 };
387 };
388 };
389 };
390 };
391
392 &usb3_0 {
393 pinctrl-names = "default";
394 pinctrl-0 = <&pmx_usb_pins>;
395 status = "okay";
396
397 vbus-supply = <&reg_usb_vbus>;
398 };
399
400 &spi1 {
401 pinctrl-names = "default";
402 pinctrl-0 = <&spi1_pins>;
403 status = "okay";
404
405 flash@0 {
406 compatible = "jedec,spi-nor";
407 reg = <0>;
408 spi-max-frequency = <50000000>;
409
410 partitions {
411 compatible = "fixed-partitions";
412 #address-cells = <1>;
413 #size-cells = <1>;
414
415 partition@0 {
416 reg = <0x0 0x1c0000>;
417 label = "u-boot";
418 read-only;
419 };
420
421 partition@1c0000 {
422 reg = <0x1c0000 0x10000>;
423 label = "firmware-info";
424
425 /*
426 * 0x10 - 0x2f : image name (image1)
427 * 0x30 - 0x4f : image name (image2)
428 * 0x170 (1byte): active image (0x0/0x1)
429 * 0x184 - 0x185: kernel block count (image1)
430 * 0x18c - 0x18d: rootfs block count (image1)
431 * 0x194 - 0x195: kernel block count (image2)
432 * 0x19c - 0x19d: rootfs block count (image2)
433 * 0x1be (1byte): bit7 -> active flag (image1)?
434 * 0x1ce (1byte): bit7 -> active flag (image2)?
435 *
436 * Note: block size --> 0x200 (512 bytes)
437 */
438 };
439
440 partition@1d0000 {
441 reg = <0x1d0000 0x10000>;
442 label = "dtb";
443 read-only;
444 };
445
446 partition@1e0000 {
447 reg = <0x1e0000 0x10000>;
448 label = "u-boot-env";
449 read-only;
450 };
451
452 partition@1f0000 {
453 reg = <0x1f0000 0x10000>;
454 label = "board-info";
455 read-only;
456
457 compatible = "nvmem-cells";
458 #address-cells = <1>;
459 #size-cells = <1>;
460
461 macaddr_bdinfo_d880: macaddr@d880 {
462 reg = <0xd880 0x6>;
463 };
464 };
465
466 partition@200000 {
467 reg = <0x200000 0x600000>;
468 label = "kernel";
469 };
470
471 partition@800000 {
472 reg = <0x800000 0x1800000>;
473 label = "rootfs";
474 };
475
476 partition@2000000 {
477 reg = <0x2000000 0x600000>;
478 label = "kn2";
479 read-only;
480 };
481
482 partition@2600000 {
483 reg = <0x2600000 0x1800000>;
484 label = "rfs2";
485 read-only;
486 };
487
488 partition@3e00000 {
489 reg = <0x3e00000 0x1200000>;
490 label = "part1";
491 read-only;
492 };
493
494 partition@5000000 {
495 reg = <0x5000000 0x1200000>;
496 label = "part2";
497 read-only;
498 };
499
500 partition@6200000 {
501 reg = <0x6200000 0x1e00000>;
502 label = "config";
503 read-only;
504 };
505 };
506 };
507 };