target/linux/mediatek/patches-6.6/321-v6.2-mmc-mtk-sd-add-Inline-Crypto-Engine-clock-control.patch

   1 From 7b438d0377fbd520b475a68bdd9de1692393f22d Mon Sep 17 00:00:00 2001
   2 From: Mengqi Zhang <mengqi.zhang@mediatek.com>
   3 Date: Sun, 6 Nov 2022 11:39:24 +0800
   4 Subject: [PATCH 2/6] mmc: mtk-sd: add Inline Crypto Engine clock control
   5
   6 Add crypto clock control and ungate it before CQHCI init.
   7
   8 Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com>
   9 Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
  10 Link: https://lore.kernel.org/r/20221106033924.9854-2-mengqi.zhang@mediatek.com
  11 Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  12 ---
  13  drivers/mmc/host/mtk-sd.c | 12 ++++++++++++
  14  1 file changed, 12 insertions(+)
  15
  16 --- a/drivers/mmc/host/mtk-sd.c
  17 +++ b/drivers/mmc/host/mtk-sd.c
  18 @@ -452,6 +452,7 @@ struct msdc_host {
  19         struct clk *bus_clk;    /* bus clock which used to access register */
  20         struct clk *src_clk_cg; /* msdc source clock control gate */
  21         struct clk *sys_clk_cg; /* msdc subsys clock control gate */
  22 +       struct clk *crypto_clk; /* msdc crypto clock control gate */
  23         struct clk_bulk_data bulk_clks[MSDC_NR_CLOCKS];
  24         u32 mclk;               /* mmc subsystem clock frequency */
  25         u32 src_clk_freq;       /* source clock frequency */
  26 @@ -840,6 +841,7 @@ static void msdc_set_busy_timeout(struct
  27  static void msdc_gate_clock(struct msdc_host *host)
  28  {
  29         clk_bulk_disable_unprepare(MSDC_NR_CLOCKS, host->bulk_clks);
  30 +       clk_disable_unprepare(host->crypto_clk);
  31         clk_disable_unprepare(host->src_clk_cg);
  32         clk_disable_unprepare(host->src_clk);
  33         clk_disable_unprepare(host->bus_clk);
  34 @@ -855,6 +857,7 @@ static int msdc_ungate_clock(struct msdc
  35         clk_prepare_enable(host->bus_clk);
  36         clk_prepare_enable(host->src_clk);
  37         clk_prepare_enable(host->src_clk_cg);
  38 +       clk_prepare_enable(host->crypto_clk);
  39         ret = clk_bulk_prepare_enable(MSDC_NR_CLOCKS, host->bulk_clks);
  40         if (ret) {
  41                 dev_err(host->dev, "Cannot enable pclk/axi/ahb clock gates\n");
  42 @@ -2670,6 +2673,15 @@ static int msdc_drv_probe(struct platfor
  43                 goto host_free;
  44         }
  45
  46 +       /* only eMMC has crypto property */
  47 +       if (!(mmc->caps2 & MMC_CAP2_NO_MMC)) {
  48 +               host->crypto_clk = devm_clk_get_optional(&pdev->dev, "crypto");
  49 +               if (IS_ERR(host->crypto_clk))
  50 +                       host->crypto_clk = NULL;
  51 +               else
  52 +                       mmc->caps2 |= MMC_CAP2_CRYPTO;
  53 +       }
  54 +
  55         host->irq = platform_get_irq(pdev, 0);
  56         if (host->irq < 0) {
  57                 ret = host->irq;