target/linux/mediatek/patches-4.9/0037-net-next-mediatek-bring-up-QDMA-RX-ring-0.patch

   1 From 047a4e7b17322c1b32d8db32a0df9899cb4963a3 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <john@phrozen.org>
   3 Date: Fri, 21 Jul 2017 08:48:38 +0200
   4 Subject: [PATCH 37/57] net-next: mediatek: bring up QDMA RX ring 0
   5
   6 This patch is in peparation for adding HW flow and QoS offloading. For
   7 those features to work, the driver needs to bring up the first QDMA RX
   8 ring. This ring is used by the PPE offloading HW.
   9
  10 Signed-off-by: John Crispin <john@phrozen.org>
  11 ---
  12  drivers/net/ethernet/mediatek/mtk_eth_soc.c | 38 ++++++++++++++++++++---------
  13  drivers/net/ethernet/mediatek/mtk_eth_soc.h |  3 +++
  14  2 files changed, 30 insertions(+), 11 deletions(-)
  15
  16 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  17 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
  18 @@ -1224,11 +1224,21 @@ static void mtk_tx_clean(struct mtk_eth
  19
  20  static int mtk_rx_alloc(struct mtk_eth *eth, int ring_no, int rx_flag)
  21  {
  22 -       struct mtk_rx_ring *ring = &eth->rx_ring[ring_no];
  23 +       struct mtk_rx_ring *ring;
  24         int rx_data_len, rx_dma_size;
  25         int i;
  26 +       u32 offset = 0;
  27
  28 -       if (rx_flag == MTK_RX_FLAGS_HWLRO) {
  29 +       if (rx_flag & MTK_RX_FLAGS_QDMA) {
  30 +               if (ring_no)
  31 +                       return -EINVAL;
  32 +               ring = &eth->rx_ring_qdma;
  33 +               offset = 0x1000;
  34 +       } else {
  35 +               ring = &eth->rx_ring[ring_no];
  36 +       }
  37 +
  38 +       if (rx_flag & MTK_RX_FLAGS_HWLRO) {
  39                 rx_data_len = MTK_MAX_LRO_RX_LENGTH;
  40                 rx_dma_size = MTK_HW_LRO_DMA_SIZE;
  41         } else {
  42 @@ -1276,17 +1286,16 @@ static int mtk_rx_alloc(struct mtk_eth *
  43          */
  44         wmb();
  45
  46 -       mtk_w32(eth, ring->phys, MTK_PRX_BASE_PTR_CFG(ring_no));
  47 -       mtk_w32(eth, rx_dma_size, MTK_PRX_MAX_CNT_CFG(ring_no));
  48 -       mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg);
  49 -       mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), MTK_PDMA_RST_IDX);
  50 +       mtk_w32(eth, ring->phys, MTK_PRX_BASE_PTR_CFG(ring_no) + offset);
  51 +       mtk_w32(eth, rx_dma_size, MTK_PRX_MAX_CNT_CFG(ring_no) + offset);
  52 +       mtk_w32(eth, ring->calc_idx, ring->crx_idx_reg + offset);
  53 +       mtk_w32(eth, MTK_PST_DRX_IDX_CFG(ring_no), MTK_PDMA_RST_IDX + offset);
  54
  55         return 0;
  56  }
  57
  58 -static void mtk_rx_clean(struct mtk_eth *eth, int ring_no)
  59 +static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring)
  60  {
  61 -       struct mtk_rx_ring *ring = &eth->rx_ring[ring_no];
  62         int i;
  63
  64         if (ring->data && ring->dma) {
  65 @@ -1612,6 +1621,10 @@ static int mtk_dma_init(struct mtk_eth *
  66         if (err)
  67                 return err;
  68
  69 +       err = mtk_rx_alloc(eth, 0, MTK_RX_FLAGS_QDMA);
  70 +       if (err)
  71 +               return err;
  72 +
  73         err = mtk_rx_alloc(eth, 0, MTK_RX_FLAGS_NORMAL);
  74         if (err)
  75                 return err;
  76 @@ -1651,12 +1664,13 @@ static void mtk_dma_free(struct mtk_eth
  77                 eth->phy_scratch_ring = 0;
  78         }
  79         mtk_tx_clean(eth);
  80 -       mtk_rx_clean(eth, 0);
  81 +       mtk_rx_clean(eth, &eth->rx_ring[0]);
  82 +       mtk_rx_clean(eth, &eth->rx_ring_qdma);
  83
  84         if (eth->hwlro) {
  85                 mtk_hwlro_rx_uninit(eth);
  86                 for (i = 1; i < MTK_MAX_RX_RING_NUM; i++)
  87 -                       mtk_rx_clean(eth, i);
  88 +                       mtk_rx_clean(eth, &eth->rx_ring[i]);
  89         }
  90
  91         kfree(eth->scratch_head);
  92 @@ -1723,7 +1737,9 @@ static int mtk_start_dma(struct mtk_eth
  93
  94         mtk_w32(eth,
  95                 MTK_TX_WB_DDONE | MTK_TX_DMA_EN |
  96 -               MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO,
  97 +               MTK_DMA_SIZE_16DWORDS | MTK_NDP_CO_PRO |
  98 +               MTK_RX_DMA_EN | MTK_RX_2B_OFFSET |
  99 +               MTK_RX_BT_32DWORDS,
 100                 MTK_QDMA_GLO_CFG);
 101
 102         mtk_w32(eth,
 103 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 104 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
 105 @@ -484,6 +484,7 @@ struct mtk_tx_ring {
 106  enum mtk_rx_flags {
 107         MTK_RX_FLAGS_NORMAL = 0,
 108         MTK_RX_FLAGS_HWLRO,
 109 +       MTK_RX_FLAGS_QDMA,
 110  };
 111
 112  /* struct mtk_rx_ring -        This struct holds info describing a RX ring
 113 @@ -527,6 +528,7 @@ struct mtk_rx_ring {
 114   * @dma_refcnt:                track how many netdevs are using the DMA engine
 115   * @tx_ring:           Pointer to the memory holding info about the TX ring
 116   * @rx_ring:           Pointer to the memory holding info about the RX ring
 117 + * @rx_ring_qdma:      Pointer to the memory holding info about the QDMA RX ring
 118   * @tx_napi:           The TX NAPI struct
 119   * @rx_napi:           The RX NAPI struct
 120   * @scratch_ring:      Newer SoCs need memory for a second HW managed TX ring
 121 @@ -556,6 +558,7 @@ struct mtk_eth {
 122         atomic_t                        dma_refcnt;
 123         struct mtk_tx_ring              tx_ring;
 124         struct mtk_rx_ring              rx_ring[MTK_MAX_RX_RING_NUM];
 125 +       struct mtk_rx_ring              rx_ring_qdma;
 126         struct napi_struct              tx_napi;
 127         struct napi_struct              rx_napi;
 128         struct mtk_tx_dma               *scratch_ring;