fe6d6d31351ebef435bdea20a57f8b4cf1da5c87
[openwrt/openwrt.git] / target / linux / layerscape / patches-5.4 / 808-i2c-0012-i2c-imx-correct-code-of-errata-A-010650-for-layersca.patch
1 From 27ea8554c8fdcdf1d7aba5ce47630d878ce96691 Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Thu, 24 Oct 2019 13:14:44 +0800
4 Subject: [PATCH] i2c: imx: correct code of errata A-010650 for layerscape
5 platform
6
7 - Simplify code with helper function i2c_imx_clr_al_bit
8 - Fix an error about clearing arbitration lost bit
9 - Fix an error that not set I2Cx_IBCR following by
10 the workaround of A-010650 (in step 5)
11
12 Reviewed-by: Clark Wang <xiaoning.wang@nxp.com>
13 Signed-off-by: Biwen Li <biwen.li@nxp.com>
14 ---
15 drivers/i2c/busses/i2c-imx.c | 38 +++++++++++++++++++-------------------
16 1 file changed, 19 insertions(+), 19 deletions(-)
17
18 --- a/drivers/i2c/busses/i2c-imx.c
19 +++ b/drivers/i2c/busses/i2c-imx.c
20 @@ -503,6 +503,14 @@ static void i2c_imx_dma_free(struct imx_
21 dma->chan_using = NULL;
22 }
23
24 +/* Clear arbitration lost bit */
25 +static void i2c_imx_clr_al_bit(unsigned int status, struct imx_i2c_struct *i2c_imx)
26 +{
27 + status &= ~I2SR_IAL;
28 + status |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IAL);
29 + imx_i2c_write_reg(status, i2c_imx, IMX_I2C_I2SR);
30 +}
31 +
32 static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
33 {
34 unsigned long orig_jiffies = jiffies;
35 @@ -515,8 +523,7 @@ static int i2c_imx_bus_busy(struct imx_i
36
37 /* check for arbitration lost */
38 if (temp & I2SR_IAL) {
39 - temp &= ~I2SR_IAL;
40 - imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
41 + i2c_imx_clr_al_bit(temp, i2c_imx);
42 return -EAGAIN;
43 }
44
45 @@ -700,14 +707,6 @@ static void i2c_imx_clr_if_bit(unsigned
46 imx_i2c_write_reg(status, i2c_imx, IMX_I2C_I2SR);
47 }
48
49 -/* Clear arbitration lost bit */
50 -static void i2c_imx_clr_al_bit(unsigned int status, struct imx_i2c_struct *i2c_imx)
51 -{
52 - status &= ~I2SR_IAL;
53 - status |= (i2c_imx->hwdata->i2sr_clr_opcode & I2SR_IAL);
54 - imx_i2c_write_reg(status, i2c_imx, IMX_I2C_I2SR);
55 -}
56 -
57 static irqreturn_t i2c_imx_master_isr(struct imx_i2c_struct *i2c_imx)
58 {
59 unsigned int status;
60 @@ -1050,12 +1049,14 @@ static int i2c_imx_recovery_for_layersca
61 gpio_set_value(i2c_imx->gpio, 1);
62
63 /*
64 - * Set I2Cx_IBCR = 0h00 to generate a STOP and then
65 - * set I2Cx_IBCR = 0h80 to reset
66 + * Set I2Cx_IBCR = 0h00 to generate a STOP
67 */
68 - temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
69 - temp &= ~(I2CR_MSTA | I2CR_MTX);
70 - imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2CR);
71 + imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode, i2c_imx, IMX_I2C_I2CR);
72 +
73 + /*
74 + * Set I2Cx_IBCR = 0h80 to reset the I2Cx controller
75 + */
76 + imx_i2c_write_reg(i2c_imx->hwdata->i2cr_ien_opcode | I2CR_IEN, i2c_imx, IMX_I2C_I2CR);
77
78 /* Restore the saved value of the register SCFG_RCWPMUXCR0 */
79 if (i2c_imx->need_set_pmuxcr == 1) {
80 @@ -1069,10 +1070,9 @@ static int i2c_imx_recovery_for_layersca
81 * I2C_IBSR[IBAL] = 1
82 */
83 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
84 - if (temp & I2SR_IAL) {
85 - temp &= ~I2SR_IAL;
86 - imx_i2c_write_reg(temp, i2c_imx, IMX_I2C_I2SR);
87 - }
88 + if (temp & I2SR_IAL)
89 + i2c_imx_clr_al_bit(temp, i2c_imx);
90 +
91 return 0;
92 }
93