7f6e4c61445a11c8b8e8df42c3d6dfaedf7be97c
[openwrt/openwrt.git] / target / linux / layerscape / patches-5.4 / 302-dts-0016-arm64-dts-ls104x-add-iommu-map-to-pci-controllers.patch
1 From 317d4e577ede33f226d24bd12a8edbaafee22e57 Mon Sep 17 00:00:00 2001
2 From: Laurentiu Tudor <laurentiu.tudor@nxp.com>
3 Date: Thu, 17 May 2018 11:56:27 +0300
4 Subject: [PATCH] arm64: dts: ls104x: add iommu-map to pci controllers
5
6 The pci controllers are also behind the smmu so add the iommu-map
7 property to reflect this. The bootloader needs to patch the stream id
8 ranges to some sane values.
9
10 Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
11 ---
12 arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 3 +++
13 arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 3 +++
14 2 files changed, 6 insertions(+)
15
16 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
17 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
18 @@ -807,6 +807,7 @@
19 #size-cells = <2>;
20 device_type = "pci";
21 dma-coherent;
22 + iommu-map = <0 &smmu 0 1>; /* update by bootloader */
23 num-viewport = <6>;
24 bus-range = <0x0 0xff>;
25 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
26 @@ -833,6 +834,7 @@
27 #size-cells = <2>;
28 device_type = "pci";
29 dma-coherent;
30 + iommu-map = <0 &smmu 0 1>; /* update by bootloader */
31 num-viewport = <6>;
32 bus-range = <0x0 0xff>;
33 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
34 @@ -859,6 +861,7 @@
35 #size-cells = <2>;
36 device_type = "pci";
37 dma-coherent;
38 + iommu-map = <0 &smmu 0 1>; /* update by bootloader */
39 num-viewport = <6>;
40 bus-range = <0x0 0xff>;
41 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */
42 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
43 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
44 @@ -715,6 +715,7 @@
45 #size-cells = <2>;
46 device_type = "pci";
47 dma-coherent;
48 + iommu-map = <0 &smmu 0 1>; /* update by bootloader */
49 num-viewport = <8>;
50 bus-range = <0x0 0xff>;
51 ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */
52 @@ -751,6 +752,7 @@
53 #size-cells = <2>;
54 device_type = "pci";
55 dma-coherent;
56 + iommu-map = <0 &smmu 0 1>; /* update by bootloader */
57 num-viewport = <8>;
58 bus-range = <0x0 0xff>;
59 ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */
60 @@ -787,6 +789,7 @@
61 #size-cells = <2>;
62 device_type = "pci";
63 dma-coherent;
64 + iommu-map = <0 &smmu 0 1>; /* update by bootloader */
65 num-viewport = <8>;
66 bus-range = <0x0 0xff>;
67 ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000 /* downstream I/O */