target/linux/layerscape/patches-5.10/302-arm64-dts-ls1012a-update-with-ppfe-support.patch

   1 From 1bb35ff4ce33e65601c8d9c736be52e4aabd6252 Mon Sep 17 00:00:00 2001
   2 From: Calvin Johnson <calvin.johnson@nxp.com>
   3 Date: Sat, 16 Sep 2017 14:20:23 +0530
   4 Subject: [PATCH] arm64: dts: freescale: ls1012a: update with ppfe support
   5
   6 Update ls1012a dtsi and platform dts files with support for ppfe.
   7
   8 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
   9 Signed-off-by: Anjaneyulu Jagarlmudi <anji.jagarlmudi@nxp.com>
  10 ---
  11  .../boot/dts/freescale/fsl-ls1012a-frdm.dts   | 43 +++++++++++++++++
  12  .../boot/dts/freescale/fsl-ls1012a-frwy.dts   | 43 +++++++++++++++++
  13  .../boot/dts/freescale/fsl-ls1012a-qds.dts    | 43 +++++++++++++++++
  14  .../boot/dts/freescale/fsl-ls1012a-rdb.dts    | 47 +++++++++++++++++++
  15  .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 29 ++++++++++++
  16  5 files changed, 205 insertions(+)
  17
  18 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
  19 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dts
  20 @@ -13,6 +13,11 @@
  21         model = "LS1012A Freedom Board";
  22         compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
  23
  24 +       aliases {
  25 +               ethernet0 = &pfe_mac0;
  26 +               ethernet1 = &pfe_mac1;
  27 +       };
  28 +
  29         sys_mclk: clock-mclk {
  30                 compatible = "fixed-clock";
  31                 #clock-cells = <0>;
  32 @@ -74,6 +79,44 @@
  33         };
  34  };
  35
  36 +&pfe {
  37 +       status = "okay";
  38 +       #address-cells = <1>;
  39 +       #size-cells = <0>;
  40 +
  41 +       pfe_mac0: ethernet@0 {
  42 +               compatible = "fsl,pfe-gemac-port";
  43 +               #address-cells = <1>;
  44 +               #size-cells = <0>;
  45 +               reg = <0x0>;    /* GEM_ID */
  46 +               fsl,gemac-bus-id = <0x0>;       /* BUS_ID */
  47 +               fsl,gemac-phy-id = <0x2>;       /* PHY_ID */
  48 +               fsl,mdio-mux-val = <0x0>;
  49 +               phy-mode = "sgmii";
  50 +               fsl,pfe-phy-if-flags = <0x0>;
  51 +
  52 +               mdio@0 {
  53 +                       reg = <0x1>; /* enabled/disabled */
  54 +               };
  55 +       };
  56 +
  57 +       pfe_mac1: ethernet@1 {
  58 +               compatible = "fsl,pfe-gemac-port";
  59 +               #address-cells = <1>;
  60 +               #size-cells = <0>;
  61 +               reg = <0x1>;    /* GEM_ID */
  62 +               fsl,gemac-bus-id = <0x1>;       /* BUS_ID */
  63 +               fsl,gemac-phy-id = <0x1>;       /* PHY_ID */
  64 +               fsl,mdio-mux-val = <0x0>;
  65 +               phy-mode = "sgmii";
  66 +               fsl,pfe-phy-if-flags = <0x0>;
  67 +
  68 +               mdio@0 {
  69 +                       reg = <0x0>; /* enabled/disabled */
  70 +               };
  71 +       };
  72 +};
  73 +
  74  &qspi {
  75         status = "okay";
  76
  77 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
  78 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-frwy.dts
  79 @@ -14,6 +14,11 @@
  80  / {
  81         model = "LS1012A FRWY Board";
  82         compatible = "fsl,ls1012a-frwy", "fsl,ls1012a";
  83 +
  84 +       aliases {
  85 +               ethernet0 = &pfe_mac0;
  86 +               ethernet1 = &pfe_mac1;
  87 +       };
  88  };
  89
  90  &duart0 {
  91 @@ -24,6 +29,44 @@
  92         status = "okay";
  93  };
  94
  95 +&pfe {
  96 +       status = "okay";
  97 +       #address-cells = <1>;
  98 +       #size-cells = <0>;
  99 +
 100 +       pfe_mac0: ethernet@0 {
 101 +               compatible = "fsl,pfe-gemac-port";
 102 +               #address-cells = <1>;
 103 +               #size-cells = <0>;
 104 +               reg = <0x0>;    /* GEM_ID */
 105 +               fsl,gemac-bus-id = <0x0>;       /* BUS_ID */
 106 +               fsl,gemac-phy-id = <0x2>;       /* PHY_ID */
 107 +               fsl,mdio-mux-val = <0x0>;
 108 +               phy-mode = "sgmii";
 109 +               fsl,pfe-phy-if-flags = <0x0>;
 110 +
 111 +               mdio@0 {
 112 +                       reg = <0x1>; /* enabled/disabled */
 113 +               };
 114 +       };
 115 +
 116 +       pfe_mac1: ethernet@1 {
 117 +               compatible = "fsl,pfe-gemac-port";
 118 +               #address-cells = <1>;
 119 +               #size-cells = <0>;
 120 +               reg = <0x1>;    /* GEM_ID */
 121 +               fsl,gemac-bus-id = <0x1>;       /* BUS_ID */
 122 +               fsl,gemac-phy-id = <0x1>;       /* PHY_ID */
 123 +               fsl,mdio-mux-val = <0x0>;
 124 +               phy-mode = "sgmii";
 125 +               fsl,pfe-phy-if-flags = <0x0>;
 126 +
 127 +               mdio@0 {
 128 +                       reg = <0x0>; /* enabled/disabled */
 129 +               };
 130 +       };
 131 +};
 132 +
 133  &qspi {
 134         status = "okay";
 135
 136 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
 137 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-qds.dts
 138 @@ -13,6 +13,11 @@
 139         model = "LS1012A QDS Board";
 140         compatible = "fsl,ls1012a-qds", "fsl,ls1012a";
 141
 142 +       aliases {
 143 +               ethernet0 = &pfe_mac0;
 144 +               ethernet1 = &pfe_mac1;
 145 +       };
 146 +
 147         sys_mclk: clock-mclk {
 148                 compatible = "fixed-clock";
 149                 #clock-cells = <0>;
 150 @@ -127,6 +132,44 @@
 151                 };
 152         };
 153  };
 154 +
 155 +&pfe {
 156 +       status = "okay";
 157 +       #address-cells = <1>;
 158 +       #size-cells = <0>;
 159 +
 160 +       pfe_mac0: ethernet@0 {
 161 +               compatible = "fsl,pfe-gemac-port";
 162 +               #address-cells = <1>;
 163 +               #size-cells = <0>;
 164 +               reg = <0x0>;    /* GEM_ID */
 165 +               fsl,gemac-bus-id = <0x0>;       /* BUS_ID */
 166 +               fsl,gemac-phy-id = <0x1>;       /* PHY_ID */
 167 +               fsl,mdio-mux-val = <0x2>;
 168 +               phy-mode = "sgmii-2500";
 169 +               fsl,pfe-phy-if-flags = <0x0>;
 170 +
 171 +               mdio@0 {
 172 +                       reg = <0x1>; /* enabled/disabled */
 173 +               };
 174 +       };
 175 +
 176 +       pfe_mac1: ethernet@1 {
 177 +               compatible = "fsl,pfe-gemac-port";
 178 +               #address-cells = <1>;
 179 +               #size-cells = <0>;
 180 +               reg = <0x1>;    /* GEM_ID */
 181 +               fsl,gemac-bus-id = <0x1>;       /* BUS_ID */
 182 +               fsl,gemac-phy-id = <0x2>;       /* PHY_ID */
 183 +               fsl,mdio-mux-val = <0x3>;
 184 +               phy-mode = "sgmii-2500";
 185 +               fsl,pfe-phy-if-flags = <0x0>;
 186 +
 187 +               mdio@0 {
 188 +                       reg = <0x0>; /* enabled/disabled */
 189 +               };
 190 +       };
 191 +};
 192
 193  &qspi {
 194         status = "okay";
 195 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
 196 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a-rdb.dts
 197 @@ -12,6 +12,15 @@
 198  / {
 199         model = "LS1012A RDB Board";
 200         compatible = "fsl,ls1012a-rdb", "fsl,ls1012a";
 201 +
 202 +       aliases {
 203 +               ethernet0 = &pfe_mac0;
 204 +               ethernet1 = &pfe_mac1;
 205 +       };
 206 +};
 207 +
 208 +&pcie1 {
 209 +       status = "okay";
 210  };
 211
 212  &duart0 {
 213 @@ -35,6 +44,44 @@
 214         status = "okay";
 215  };
 216
 217 +&pfe {
 218 +       status = "okay";
 219 +       #address-cells = <1>;
 220 +       #size-cells = <0>;
 221 +
 222 +       pfe_mac0: ethernet@0 {
 223 +               compatible = "fsl,pfe-gemac-port";
 224 +               #address-cells = <1>;
 225 +               #size-cells = <0>;
 226 +               reg = <0x0>;    /* GEM_ID */
 227 +               fsl,gemac-bus-id = <0x0>;       /* BUS_ID */
 228 +               fsl,gemac-phy-id = <0x2>;       /* PHY_ID */
 229 +               fsl,mdio-mux-val = <0x0>;
 230 +               phy-mode = "sgmii";
 231 +               fsl,pfe-phy-if-flags = <0x0>;
 232 +
 233 +               mdio@0 {
 234 +                       reg = <0x1>; /* enabled/disabled */
 235 +               };
 236 +       };
 237 +
 238 +       pfe_mac1: ethernet@1 {
 239 +               compatible = "fsl,pfe-gemac-port";
 240 +               #address-cells = <1>;
 241 +               #size-cells = <0>;
 242 +               reg = <0x1>;    /* GEM_ID */
 243 +               fsl,gemac-bus-id = < 0x1 >;     /* BUS_ID */
 244 +               fsl,gemac-phy-id = < 0x1 >;     /* PHY_ID */
 245 +               fsl,mdio-mux-val = <0x0>;
 246 +               phy-mode = "rgmii-txid";
 247 +               fsl,pfe-phy-if-flags = <0x0>;
 248 +
 249 +               mdio@0 {
 250 +                       reg = <0x0>; /* enabled/disabled */
 251 +               };
 252 +       };
 253 +};
 254 +
 255  &qspi {
 256         status = "okay";
 257
 258 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
 259 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
 260 @@ -531,6 +531,35 @@
 261                 };
 262         };
 263
 264 +       reserved-memory {
 265 +               #address-cells = <2>;
 266 +               #size-cells = <2>;
 267 +               ranges;
 268 +
 269 +               pfe_reserved: packetbuffer@83400000 {
 270 +                       reg = <0 0x83400000 0 0xc00000>;
 271 +               };
 272 +       };
 273 +
 274 +       pfe: pfe@04000000 {
 275 +               compatible = "fsl,pfe";
 276 +               reg =   <0x0 0x04000000 0x0 0xc00000>,  /* AXI 16M */
 277 +                       <0x0 0x83400000 0x0 0xc00000>;  /* PFE DDR 12M */
 278 +               reg-names = "pfe", "pfe-ddr";
 279 +               fsl,pfe-num-interfaces = <0x2>;
 280 +               interrupts = <0 172 0x4>,    /* HIF interrupt */
 281 +                            <0 173 0x4>,    /*HIF_NOCPY interrupt */
 282 +                            <0 174 0x4>;    /* WoL interrupt */
 283 +               interrupt-names = "pfe_hif", "pfe_hif_nocpy", "pfe_wol";
 284 +               memory-region = <&pfe_reserved>;
 285 +               fsl,pfe-scfg = <&scfg 0>;
 286 +               fsl,rcpm-wakeup = <&rcpm 0xf0000020>;
 287 +               clocks = <&clockgen 4 0>;
 288 +               clock-names = "pfe";
 289 +
 290 +               status = "okay";
 291 +       };
 292 +
 293         firmware {
 294                 optee {
 295                         compatible = "linaro,optee-tz";