target/linux/layerscape/patches-4.4/3013-dts-ls1043ardb-add-mdio-phy-nodes.patch

   1 From e2b301610e6201df40deb62942b18c772365eb1c Mon Sep 17 00:00:00 2001
   2 From: Shaohui Xie <Shaohui.Xie@freescale.com>
   3 Date: Thu, 21 Jan 2016 11:29:22 +0800
   4 Subject: [PATCH 13/70] dts: ls1043ardb: add mdio & phy nodes
   5
   6 Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
   7 ---
   8  arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts |   65 +++++++++++++++++++++
   9  1 file changed, 65 insertions(+)
  10
  11 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
  12 +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
  13 @@ -115,3 +115,68 @@
  14  &duart1 {
  15         status = "okay";
  16  };
  17 +
  18 +&fman0 {
  19 +       ethernet@e0000 {
  20 +               phy-handle = <&qsgmii_phy1>;
  21 +               phy-connection-type = "qsgmii";
  22 +       };
  23 +
  24 +       ethernet@e2000 {
  25 +               phy-handle = <&qsgmii_phy2>;
  26 +               phy-connection-type = "qsgmii";
  27 +       };
  28 +
  29 +       ethernet@e4000 {
  30 +               phy-handle = <&rgmii_phy1>;
  31 +               phy-connection-type = "rgmii";
  32 +       };
  33 +
  34 +       ethernet@e6000 {
  35 +               phy-handle = <&rgmii_phy2>;
  36 +               phy-connection-type = "rgmii";
  37 +       };
  38 +
  39 +       ethernet@e8000 {
  40 +               phy-handle = <&qsgmii_phy3>;
  41 +               phy-connection-type = "qsgmii";
  42 +       };
  43 +
  44 +       ethernet@ea000 {
  45 +               phy-handle = <&qsgmii_phy4>;
  46 +               phy-connection-type = "qsgmii";
  47 +       };
  48 +
  49 +       ethernet@f0000 { /* 10GEC1 */
  50 +               phy-handle = <&aqr105_phy>;
  51 +               phy-connection-type = "xgmii";
  52 +       };
  53 +
  54 +       mdio@fc000 {
  55 +               rgmii_phy1: ethernet-phy@1 {
  56 +                       reg = <0x1>;
  57 +               };
  58 +               rgmii_phy2: ethernet-phy@2 {
  59 +                       reg = <0x2>;
  60 +               };
  61 +               qsgmii_phy1: ethernet-phy@3 {
  62 +                       reg = <0x4>;
  63 +               };
  64 +               qsgmii_phy2: ethernet-phy@4 {
  65 +                       reg = <0x5>;
  66 +               };
  67 +               qsgmii_phy3: ethernet-phy@5 {
  68 +                       reg = <0x6>;
  69 +               };
  70 +               qsgmii_phy4: ethernet-phy@6 {
  71 +                       reg = <0x7>;
  72 +               };
  73 +       };
  74 +
  75 +       mdio@fd000 {
  76 +               aqr105_phy: ethernet-phy@c {
  77 +                       compatible = "ethernet-phy-ieee802.3-c45";
  78 +                       reg = <0x1>;
  79 +               };
  80 +       };
  81 +};