lantiq: modify vr9.dts to support vmmc
[openwrt/openwrt.git] / target / linux / lantiq / dts / vr9.dtsi
1 #include <dt-bindings/gpio/gpio.h>
2 #include <dt-bindings/input/input.h>
3
4 / {
5 #address-cells = <1>;
6 #size-cells = <1>;
7 compatible = "lantiq,xway", "lantiq,vr9";
8
9 cpus {
10 cpu@0 {
11 compatible = "mips,mips34Kc";
12 };
13 };
14
15 memory@0 {
16 device_type = "memory";
17 };
18
19 cputemp@0 {
20 compatible = "lantiq,cputemp";
21 };
22
23 biu@1F800000 {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "lantiq,biu", "simple-bus";
27 reg = <0x1F800000 0x800000>;
28 ranges = <0x0 0x1F800000 0x7FFFFF>;
29
30 icu0: icu@80200 {
31 #interrupt-cells = <1>;
32 interrupt-controller;
33 compatible = "lantiq,icu";
34 reg = <0x80200 0x28
35 0x80228 0x28
36 0x80250 0x28
37 0x80278 0x28
38 0x802a0 0x28>;
39 };
40
41 watchdog@803F0 {
42 compatible = "lantiq,wdt";
43 reg = <0x803F0 0x10>;
44 };
45 };
46
47 sram@1F000000 {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "lantiq,sram", "simple-bus";
51 reg = <0x1F000000 0x800000>;
52 ranges = <0x0 0x1F000000 0x7FFFFF>;
53
54 eiu0: eiu@101000 {
55 #interrupt-cells = <1>;
56 interrupt-controller;
57 compatible = "lantiq,eiu-xway";
58 reg = <0x101000 0x1000>;
59 interrupt-parent = <&icu0>;
60 lantiq,eiu-irqs = <166 135 66 40 41 42>;
61 };
62
63 pmu0: pmu@102000 {
64 compatible = "lantiq,pmu-xway";
65 reg = <0x102000 0x1000>;
66 };
67
68 cgu0: cgu@103000 {
69 compatible = "lantiq,cgu-xway";
70 reg = <0x103000 0x1000>;
71 };
72
73 dcdc@106a00 {
74 compatible = "lantiq,dcdc-xrx200";
75 reg = <0x106a00 0x200>;
76 };
77
78 vmmc@107000 {
79 status = "disabled";
80 compatible = "lantiq,vmmc-xway";
81 reg = <0x103000 0x400>;
82 interrupt-parent = <&icu0>;
83 interrupts = <150 151 152 153 154 155>;
84 };
85
86 rcu0: rcu@203000 {
87 compatible = "lantiq,rcu-xrx200";
88 reg = <0x203000 0x1000>;
89 /* irq for thermal sensor */
90 interrupt-parent = <&icu0>;
91 interrupts = <115>;
92 };
93
94 xbar0: xbar@400000 {
95 compatible = "lantiq,xbar-xway";
96 reg = <0x400000 0x1000>;
97 };
98 };
99
100 fpi@10000000 {
101 #address-cells = <1>;
102 #size-cells = <1>;
103 compatible = "lantiq,fpi", "simple-bus";
104 ranges = <0x0 0x10000000 0xEEFFFFF>;
105 reg = <0x10000000 0xEF00000>;
106
107 localbus@0 {
108 #address-cells = <2>;
109 #size-cells = <1>;
110 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
111 1 0 0x4000000 0x4000010>; /* addsel1 */
112 compatible = "lantiq,localbus", "simple-bus";
113 };
114
115 gptu@E100A00 {
116 compatible = "lantiq,gptu-xway";
117 reg = <0xE100A00 0x100>;
118 interrupt-parent = <&icu0>;
119 interrupts = <126 127 128 129 130 131>;
120 };
121
122 asc0: serial@E100400 {
123 compatible = "lantiq,asc";
124 reg = <0xE100400 0x400>;
125 interrupt-parent = <&icu0>;
126 interrupts = <104 105 106>;
127 status = "disabled";
128 };
129
130 spi: spi@E100800 {
131 compatible = "lantiq,xrx200-spi";
132 reg = <0xE100800 0x100>;
133 interrupt-parent = <&icu0>;
134 interrupts = <22 23 24>;
135 interrupt-names = "spi_rx", "spi_tx", "spi_err",
136 "spi_frm";
137 #address-cells = <1>;
138 #size-cells = <1>;
139 status = "disabled";
140 };
141
142 gpio: pinmux@E100B10 {
143 compatible = "lantiq,xrx200-pinctrl";
144 #gpio-cells = <2>;
145 gpio-controller;
146 reg = <0xE100B10 0xA0>;
147 };
148
149 asc1: serial@E100C00 {
150 compatible = "lantiq,asc";
151 reg = <0xE100C00 0x400>;
152 interrupt-parent = <&icu0>;
153 interrupts = <112 113 114>;
154 };
155
156 deu@E103100 {
157 compatible = "lantiq,deu-xrx200";
158 reg = <0xE103100 0xf00>;
159 };
160
161 dma0: dma@E104100 {
162 compatible = "lantiq,dma-xway";
163 reg = <0xE104100 0x800>;
164 };
165
166 ebu0: ebu@E105300 {
167 compatible = "lantiq,ebu-xway";
168 reg = <0xE105300 0x100>;
169 };
170
171 ifxhcd@E101000 {
172 status = "disabled";
173 compatible = "lantiq,ifxhcd-xrx200", "lantiq,ifxhcd-xrx200-dwc2";
174 reg = <0xE101000 0x1000
175 0xE120000 0x3f000>;
176 interrupt-parent = <&icu0>;
177 interrupts = <62 91>;
178 };
179
180 ifxhcd@E106000 {
181 status = "disabled";
182 compatible = "lantiq,ifxhcd-xrx200-dwc2";
183 reg = <0xE106000 0x1000>;
184 interrupt-parent = <&icu0>;
185 interrupts = <91>;
186 };
187
188 eth0: eth@E108000 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "lantiq,xrx200-net";
192 reg = < 0xE108000 0x3000 /* switch */
193 0xE10B100 0x70 /* mdio */
194 0xE10B1D8 0x30 /* mii */
195 0xE10B308 0x30 /* pmac */
196 >;
197 interrupt-parent = <&icu0>;
198 interrupts = <75 73 72>;
199 };
200
201 mei@E116000 {
202 compatible = "lantiq,mei-xrx200";
203 reg = <0xE116000 0x9c>;
204 interrupt-parent = <&icu0>;
205 interrupts = <63>;
206 };
207
208 ppe@E234000 {
209 compatible = "lantiq,ppe-xrx200";
210 interrupt-parent = <&icu0>;
211 interrupts = <96>;
212 };
213
214 pcie@d900000 {
215 interrupt-parent = <&icu0>;
216 interrupts = <161 144>;
217 compatible = "lantiq,pcie-xrx200";
218 gpio-reset = <&gpio 38 GPIO_ACTIVE_HIGH>;
219 };
220
221 pci0: pci@E105400 {
222 #address-cells = <3>;
223 #size-cells = <2>;
224 #interrupt-cells = <1>;
225 compatible = "lantiq,pci-xway";
226 bus-range = <0x0 0x0>;
227 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
228 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
229 reg = <0x7000000 0x8000 /* config space */
230 0xE105400 0x400>; /* pci bridge */
231 status = "disabled";
232 };
233 };
234
235 vdsl {
236 compatible = "lantiq,vdsl-vrx200";
237 };
238 };