15d73a50be05c71fe9c09d7fc035dbf2931b8dd0
[openwrt/openwrt.git] / target / linux / lantiq / dts / vr9.dtsi
1 / {
2 #address-cells = <1>;
3 #size-cells = <1>;
4 compatible = "lantiq,xway", "lantiq,vr9";
5
6 cpus {
7 cpu@0 {
8 compatible = "mips,mips34Kc";
9 };
10 };
11
12 memory@0 {
13 device_type = "memory";
14 };
15
16 biu@1F800000 {
17 #address-cells = <1>;
18 #size-cells = <1>;
19 compatible = "lantiq,biu", "simple-bus";
20 reg = <0x1F800000 0x800000>;
21 ranges = <0x0 0x1F800000 0x7FFFFF>;
22
23 icu0: icu@80200 {
24 #interrupt-cells = <1>;
25 interrupt-controller;
26 compatible = "lantiq,icu";
27 reg = <0x80200 0x28
28 0x80228 0x28
29 0x80250 0x28
30 0x80278 0x28
31 0x802a0 0x28>;
32 };
33
34 watchdog@803F0 {
35 compatible = "lantiq,wdt";
36 reg = <0x803F0 0x10>;
37 };
38 };
39
40 sram@1F000000 {
41 #address-cells = <1>;
42 #size-cells = <1>;
43 compatible = "lantiq,sram", "simple-bus";
44 reg = <0x1F000000 0x800000>;
45 ranges = <0x0 0x1F000000 0x7FFFFF>;
46
47 eiu0: eiu@101000 {
48 #interrupt-cells = <1>;
49 interrupt-controller;
50 compatible = "lantiq,eiu-xway";
51 reg = <0x101000 0x1000>;
52 interrupt-parent = <&icu0>;
53 lantiq,eiu-irqs = <166 135 66 40 41 42>;
54 };
55
56 pmu0: pmu@102000 {
57 compatible = "lantiq,pmu-xway";
58 reg = <0x102000 0x1000>;
59 };
60
61 cgu0: cgu@103000 {
62 compatible = "lantiq,cgu-xway";
63 reg = <0x103000 0x1000>;
64 };
65
66 dcdc@106a00 {
67 compatible = "lantiq,dcdc-xrx200";
68 reg = <0x106a00 0x200>;
69 };
70
71 rcu0: rcu@203000 {
72 compatible = "lantiq,rcu-xrx200";
73 reg = <0x203000 0x1000>;
74 /* irq for thermal sensor */
75 interrupt-parent = <&icu0>;
76 interrupts = <115>;
77 };
78
79 xbar0: xbar@400000 {
80 compatible = "lantiq,xbar-xway";
81 reg = <0x400000 0x1000>;
82 };
83 };
84
85 fpi@10000000 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 compatible = "lantiq,fpi", "simple-bus";
89 ranges = <0x0 0x10000000 0xEEFFFFF>;
90 reg = <0x10000000 0xEF00000>;
91
92 localbus@0 {
93 #address-cells = <2>;
94 #size-cells = <1>;
95 ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
96 1 0 0x4000000 0x4000010>; /* addsel1 */
97 compatible = "lantiq,localbus", "simple-bus";
98 };
99
100 gptu@E100A00 {
101 compatible = "lantiq,gptu-xway";
102 reg = <0xE100A00 0x100>;
103 interrupt-parent = <&icu0>;
104 interrupts = <126 127 128 129 130 131>;
105 };
106
107 asc0: serial@E100400 {
108 compatible = "lantiq,asc";
109 reg = <0xE100400 0x400>;
110 interrupt-parent = <&icu0>;
111 interrupts = <104 105 106>;
112 status = "disabled";
113 };
114
115 spi: spi@E100800 {
116 compatible = "lantiq,xrx200-spi";
117 reg = <0xE100800 0x100>;
118 interrupt-parent = <&icu0>;
119 interrupts = <22 23 24>;
120 interrupt-names = "spi_rx", "spi_tx", "spi_err",
121 "spi_frm";
122 #address-cells = <1>;
123 #size-cells = <1>;
124 status = "disabled";
125 };
126
127 gpio: pinmux@E100B10 {
128 compatible = "lantiq,xrx200-pinctrl";
129 #gpio-cells = <2>;
130 gpio-controller;
131 reg = <0xE100B10 0xA0>;
132 };
133
134 asc1: serial@E100C00 {
135 compatible = "lantiq,asc";
136 reg = <0xE100C00 0x400>;
137 interrupt-parent = <&icu0>;
138 interrupts = <112 113 114>;
139 };
140
141 deu@E103100 {
142 compatible = "lantiq,deu-xrx200";
143 reg = <0xE103100 0xf00>;
144 };
145
146 dma0: dma@E104100 {
147 compatible = "lantiq,dma-xway";
148 reg = <0xE104100 0x800>;
149 };
150
151 ebu0: ebu@E105300 {
152 compatible = "lantiq,ebu-xway";
153 reg = <0xE105300 0x100>;
154 };
155
156 ifxhcd@E101000 {
157 status = "disabled";
158 compatible = "lantiq,ifxhcd-xrx200", "lantiq,ifxhcd-xrx200-dwc2";
159 reg = <0xE101000 0x1000
160 0xE120000 0x3f000>;
161 interrupt-parent = <&icu0>;
162 interrupts = <62 91>;
163 };
164
165 ifxhcd@E106000 {
166 status = "disabled";
167 compatible = "lantiq,ifxhcd-xrx200-dwc2";
168 reg = <0xE106000 0x1000>;
169 interrupt-parent = <&icu0>;
170 interrupts = <91>;
171 };
172
173 eth0: eth@E108000 {
174 #address-cells = <1>;
175 #size-cells = <0>;
176 compatible = "lantiq,xrx200-net";
177 reg = < 0xE108000 0x3000 /* switch */
178 0xE10B100 0x70 /* mdio */
179 0xE10B1D8 0x30 /* mii */
180 0xE10B308 0x30 /* pmac */
181 >;
182 interrupt-parent = <&icu0>;
183 interrupts = <73 72>;
184 };
185
186 mei@E116000 {
187 compatible = "lantiq,mei-xrx200";
188 reg = <0xE116000 0x9c>;
189 interrupt-parent = <&icu0>;
190 interrupts = <63>;
191 };
192
193 ppe@E234000 {
194 compatible = "lantiq,ppe-xrx200";
195 interrupt-parent = <&icu0>;
196 interrupts = <96>;
197 };
198
199 pcie@d900000 {
200 interrupt-parent = <&icu0>;
201 interrupts = <161 144>;
202 compatible = "lantiq,pcie-xrx200";
203 gpio-reset = <&gpio 38 0>;
204 };
205
206 pci0: pci@E105400 {
207 #address-cells = <3>;
208 #size-cells = <2>;
209 #interrupt-cells = <1>;
210 compatible = "lantiq,pci-xway";
211 bus-range = <0x0 0x0>;
212 ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
213 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */
214 reg = <0x7000000 0x8000 /* config space */
215 0xE105400 0x400>; /* pci bridge */
216 status = "disabled";
217 };
218 };
219
220 vdsl {
221 compatible = "lantiq,vdsl-vrx200";
222 };
223 };