target/linux/ipq806x/patches-5.15/097-3-clk-qcom-krait-add-missing-enable-disable.patch

   1 From f8fdbecdaca97f0f2eebd77256e2eca4a8da6c39 Mon Sep 17 00:00:00 2001
   2 From: Ansuel Smith <ansuelsmth@gmail.com>
   3 Date: Sun, 7 Feb 2021 17:08:16 +0100
   4 Subject: [PATCH 3/4] clk: qcom: krait: add missing enable disable
   5
   6 Add missing enable disable mux function. Add extra check to
   7 div2_round_rate.
   8
   9 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
  10 ---
  11  drivers/clk/qcom/clk-krait.c | 27 +++++++++++++++++++++++++--
  12  1 file changed, 25 insertions(+), 2 deletions(-)
  13
  14 --- a/drivers/clk/qcom/clk-krait.c
  15 +++ b/drivers/clk/qcom/clk-krait.c
  16 @@ -68,7 +68,25 @@ static u8 krait_mux_get_parent(struct cl
  17         return clk_mux_val_to_index(hw, mux->parent_map, 0, sel);
  18  }
  19
  20 +static int krait_mux_enable(struct clk_hw *hw)
  21 +{
  22 +       struct krait_mux_clk *mux = to_krait_mux_clk(hw);
  23 +
  24 +       __krait_mux_set_sel(mux, mux->en_mask);
  25 +
  26 +       return 0;
  27 +}
  28 +
  29 +static void krait_mux_disable(struct clk_hw *hw)
  30 +{
  31 +       struct krait_mux_clk *mux = to_krait_mux_clk(hw);
  32 +
  33 +       __krait_mux_set_sel(mux, mux->safe_sel);
  34 +}
  35 +
  36  const struct clk_ops krait_mux_clk_ops = {
  37 +       .enable = krait_mux_enable,
  38 +       .disable = krait_mux_disable,
  39         .set_parent = krait_mux_set_parent,
  40         .get_parent = krait_mux_get_parent,
  41         .determine_rate = __clk_mux_determine_rate_closest,
  42 @@ -79,8 +97,13 @@ EXPORT_SYMBOL_GPL(krait_mux_clk_ops);
  43  static long krait_div2_round_rate(struct clk_hw *hw, unsigned long rate,
  44                                   unsigned long *parent_rate)
  45  {
  46 -       *parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw), rate * 2);
  47 -       return DIV_ROUND_UP(*parent_rate, 2);
  48 +       struct clk_hw *hw_parent = clk_hw_get_parent(hw);
  49 +
  50 +       if (hw_parent) {
  51 +               *parent_rate = clk_hw_round_rate(hw_parent, rate * 2);
  52 +               return DIV_ROUND_UP(*parent_rate, 2);
  53 +       } else
  54 +               return -1;
  55  }
  56
  57  static int krait_div2_set_rate(struct clk_hw *hw, unsigned long rate,