target/linux/ipq806x/patches-4.9/862-dmaengine-qcom-bam_dma-Add-custom-data-mapping.patch

   1 From 5a7ccdf845d64b385affdcffaf2defbe9848be15 Mon Sep 17 00:00:00 2001
   2 From: Ram Chandra Jangir <rjangir@codeaurora.org>
   3 Date: Thu, 20 Apr 2017 10:39:00 +0530
   4 Subject: [PATCH] dmaengine: qcom: bam_dma: Add custom data mapping
   5
   6 Add a new function to support for preparing DMA descriptor
   7 for custom data.
   8
   9 Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
  10 Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
  11 ---
  12  drivers/dma/qcom/bam_dma.c       | 97 +++++++++++++++++++++++++++++++++++++---
  13  include/linux/dma/qcom_bam_dma.h | 14 ++++++
  14  include/linux/dmaengine.h        | 14 ++++++
  15  3 files changed, 119 insertions(+), 6 deletions(-)
  16
  17 --- a/drivers/dma/qcom/bam_dma.c
  18 +++ b/drivers/dma/qcom/bam_dma.c
  19 @@ -49,6 +49,7 @@
  20  #include <linux/clk.h>
  21  #include <linux/dmaengine.h>
  22  #include <linux/pm_runtime.h>
  23 +#include <linux/dma/qcom_bam_dma.h>
  24
  25  #include "../dmaengine.h"
  26  #include "../virt-dma.h"
  27 @@ -61,11 +62,6 @@ struct bam_desc_hw {
  28
  29  #define BAM_DMA_AUTOSUSPEND_DELAY 100
  30
  31 -#define DESC_FLAG_INT BIT(15)
  32 -#define DESC_FLAG_EOT BIT(14)
  33 -#define DESC_FLAG_EOB BIT(13)
  34 -#define DESC_FLAG_NWD BIT(12)
  35 -
  36  struct bam_async_desc {
  37         struct virt_dma_desc vd;
  38
  39 @@ -670,6 +666,93 @@ err_out:
  40  }
  41
  42  /**
  43 + * bam_prep_dma_custom_mapping - Prep DMA descriptor from custom data
  44 + *
  45 + * @chan: dma channel
  46 + * @data: custom data
  47 + * @flags: DMA flags
  48 + */
  49 +static struct dma_async_tx_descriptor *bam_prep_dma_custom_mapping(
  50 +               struct dma_chan *chan,
  51 +               void *data, unsigned long flags)
  52 +{
  53 +       struct bam_chan *bchan = to_bam_chan(chan);
  54 +       struct bam_device *bdev = bchan->bdev;
  55 +       struct bam_async_desc *async_desc;
  56 +       struct qcom_bam_custom_data *desc_data = data;
  57 +       u32 i;
  58 +       struct bam_desc_hw *desc;
  59 +       unsigned int num_alloc = 0;
  60 +
  61 +
  62 +       if (!is_slave_direction(desc_data->dir)) {
  63 +               dev_err(bdev->dev, "invalid dma direction\n");
  64 +               return NULL;
  65 +       }
  66 +
  67 +       /* calculate number of required entries */
  68 +       for (i = 0; i < desc_data->sgl_cnt; i++)
  69 +               num_alloc += DIV_ROUND_UP(
  70 +                       sg_dma_len(&desc_data->bam_sgl[i].sgl), BAM_FIFO_SIZE);
  71 +
  72 +       /* allocate enough room to accommodate the number of entries */
  73 +       async_desc = kzalloc(sizeof(*async_desc) +
  74 +                       (num_alloc * sizeof(struct bam_desc_hw)), GFP_NOWAIT);
  75 +
  76 +       if (!async_desc)
  77 +               goto err_out;
  78 +
  79 +       if (flags & DMA_PREP_FENCE)
  80 +               async_desc->flags |= DESC_FLAG_NWD;
  81 +
  82 +       if (flags & DMA_PREP_INTERRUPT)
  83 +               async_desc->flags |= DESC_FLAG_EOT;
  84 +       else
  85 +               async_desc->flags |= DESC_FLAG_INT;
  86 +
  87 +       async_desc->num_desc = num_alloc;
  88 +       async_desc->curr_desc = async_desc->desc;
  89 +       async_desc->dir = desc_data->dir;
  90 +
  91 +       /* fill in temporary descriptors */
  92 +       desc = async_desc->desc;
  93 +       for (i = 0; i < desc_data->sgl_cnt; i++) {
  94 +               unsigned int remainder;
  95 +               unsigned int curr_offset = 0;
  96 +
  97 +               remainder = sg_dma_len(&desc_data->bam_sgl[i].sgl);
  98 +
  99 +               do {
 100 +                       desc->addr = cpu_to_le32(
 101 +                               sg_dma_address(&desc_data->bam_sgl[i].sgl) +
 102 +                                                curr_offset);
 103 +
 104 +                       if (desc_data->bam_sgl[i].dma_flags)
 105 +                               desc->flags |= cpu_to_le16(
 106 +                                       desc_data->bam_sgl[i].dma_flags);
 107 +
 108 +                       if (remainder > BAM_FIFO_SIZE) {
 109 +                               desc->size = cpu_to_le16(BAM_FIFO_SIZE);
 110 +                               remainder -= BAM_FIFO_SIZE;
 111 +                               curr_offset += BAM_FIFO_SIZE;
 112 +                       } else {
 113 +                               desc->size = cpu_to_le16(remainder);
 114 +                               remainder = 0;
 115 +                       }
 116 +
 117 +                       async_desc->length += desc->size;
 118 +                       desc++;
 119 +               } while (remainder > 0);
 120 +       }
 121 +
 122 +       return vchan_tx_prep(&bchan->vc, &async_desc->vd, flags);
 123 +
 124 +err_out:
 125 +       kfree(async_desc);
 126 +       return NULL;
 127 +}
 128 +
 129 +/**
 130   * bam_dma_terminate_all - terminate all transactions on a channel
 131   * @bchan: bam dma channel
 132   *
 133 @@ -960,7 +1043,7 @@ static void bam_start_dma(struct bam_cha
 134
 135         /* set any special flags on the last descriptor */
 136         if (async_desc->num_desc == async_desc->xfer_len)
 137 -               desc[async_desc->xfer_len - 1].flags =
 138 +               desc[async_desc->xfer_len - 1].flags |=
 139                                         cpu_to_le16(async_desc->flags);
 140         else
 141                 desc[async_desc->xfer_len - 1].flags |=
 142 @@ -1237,6 +1320,8 @@ static int bam_dma_probe(struct platform
 143         bdev->common.device_alloc_chan_resources = bam_alloc_chan;
 144         bdev->common.device_free_chan_resources = bam_free_chan;
 145         bdev->common.device_prep_slave_sg = bam_prep_slave_sg;
 146 +       bdev->common.device_prep_dma_custom_mapping =
 147 +               bam_prep_dma_custom_mapping;
 148         bdev->common.device_config = bam_slave_config;
 149         bdev->common.device_pause = bam_pause;
 150         bdev->common.device_resume = bam_resume;
 151 --- a/include/linux/dma/qcom_bam_dma.h
 152 +++ b/include/linux/dma/qcom_bam_dma.h
 153 @@ -65,6 +65,19 @@ enum bam_command_type {
 154  };
 155
 156  /*
 157 + * QCOM BAM DMA custom data
 158 + *
 159 + * @sgl_cnt: number of sgl in bam_sgl
 160 + * @dir: DMA data transfer direction
 161 + * @bam_sgl: BAM SGL pointer
 162 + */
 163 +struct qcom_bam_custom_data {
 164 +       u32 sgl_cnt;
 165 +       enum dma_transfer_direction dir;
 166 +       struct qcom_bam_sgl *bam_sgl;
 167 +};
 168 +
 169 +/*
 170   * qcom_bam_sg_init_table - Init QCOM BAM SGL
 171   * @bam_sgl: bam sgl
 172   * @nents: number of entries in bam sgl
 173 --- a/include/linux/dmaengine.h
 174 +++ b/include/linux/dmaengine.h
 175 @@ -692,6 +692,8 @@ struct dma_filter {
 176   *     be called after period_len bytes have been transferred.
 177   * @device_prep_interleaved_dma: Transfer expression in a generic way.
 178   * @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address
 179 + * @device_prep_dma_custom_mapping: prepares a dma operation from dma driver
 180 + *     specific custom data
 181   * @device_config: Pushes a new configuration to a channel, return 0 or an error
 182   *     code
 183   * @device_pause: Pauses any transfer happening on a channel. Returns
 184 @@ -783,6 +785,9 @@ struct dma_device {
 185         struct dma_async_tx_descriptor *(*device_prep_dma_imm_data)(
 186                 struct dma_chan *chan, dma_addr_t dst, u64 data,
 187                 unsigned long flags);
 188 +       struct dma_async_tx_descriptor *(*device_prep_dma_custom_mapping)(
 189 +               struct dma_chan *chan, void *data,
 190 +               unsigned long flags);
 191
 192         int (*device_config)(struct dma_chan *chan,
 193                              struct dma_slave_config *config);
 194 @@ -899,6 +904,15 @@ static inline struct dma_async_tx_descri
 195                         src_sg, src_nents, flags);
 196  }
 197
 198 +static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_custom_mapping(
 199 +               struct dma_chan *chan,
 200 +               void *data,
 201 +               unsigned long flags)
 202 +{
 203 +       return chan->device->device_prep_dma_custom_mapping(chan, data,
 204 +                       flags);
 205 +}
 206 +
 207  /**
 208   * dmaengine_terminate_all() - Terminate all active DMA transfers
 209   * @chan: The channel for which to terminate the transfers