target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8068-ap3935.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq8064-v2.0.dtsi"
   4
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/soc/qcom,tcsr.h>
   7
   8 / {
   9         model = "Extreme Networks AP3935";
  10         compatible = "extreme,ap3935", "qcom,ipq8064";
  11
  12         memory@0 {
  13                 reg = <0x41400000 0x3ec00000>;
  14                 device_type = "memory";
  15         };
  16
  17         aliases {
  18                 serial0 = &gsbi7_serial;
  19                 serial1 = &gsbi2_serial;
  20                 mdio-gpio0 = &mdio0;
  21                 ethernet0 = &gmac0;
  22                 ethernet1 = &gmac2;
  23
  24                 led-boot = &led_power_green;
  25                 led-failsafe = &led_power_orange;
  26                 led-running = &led_power_green;
  27                 led-upgrade = &led_power_green;
  28         };
  29
  30         chosen {
  31                 stdout-path = "serial0:115200n8";
  32                 bootargs-override = "ubi.block=0,0 root=/dev/ubiblock0_0";
  33         };
  34
  35         keys {
  36                 compatible = "gpio-keys";
  37                 pinctrl-0 = <&button_pins>;
  38                 pinctrl-names = "default";
  39
  40                 reset {
  41                         label = "reset";
  42                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
  43                         linux,code = <KEY_RESTART>;
  44                         debounce-interval = <60>;
  45                         wakeup-source;
  46                 };
  47         };
  48
  49         leds {
  50                 compatible = "gpio-leds";
  51                 pinctrl-0 = <&led_pins>;
  52                 pinctrl-names = "default";
  53
  54                 led_power_green: power_green {
  55                         label = "green:power";
  56                         gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
  57                 };
  58
  59                 led_power_orange: power_orange {
  60                         label = "orange:power";
  61                         gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
  62                 };
  63
  64                 led_wlan2g_green {
  65                         label = "green:wlan2g";
  66                         gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  67                         linux,default-trigger = "phy0tpt";
  68                 };
  69
  70                 led_wlan5g_green {
  71                         label = "green:wlan5g";
  72                         gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
  73                         linux,default-trigger = "phy1tpt";
  74                 };
  75
  76                 led_lan1_green {
  77                         label = "green:lan1";
  78                         gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
  79                 };
  80
  81                 led_lan1_orange {
  82                         label = "orange:lan1";
  83                         gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>;
  84                 };
  85
  86                 led_lan2_green {
  87                         label = "green:lan2";
  88                         gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
  89                 };
  90
  91                 led_lan2_orange {
  92                         label = "orange:lan2";
  93                         gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>;
  94                 };
  95         };
  96 };
  97
  98
  99 &qcom_pinmux {
 100         spi_pins: spi_pins {
 101                 mux {
 102                         pins = "gpio18", "gpio19";
 103                         function = "gsbi5";
 104                         drive-strength = <10>;
 105                         bias-pull-down;
 106                 };
 107
 108                 clk {
 109                         pins = "gpio21";
 110                         function = "gsbi5";
 111                         drive-strength = <12>;
 112                         bias-pull-down;
 113                 };
 114
 115                 cs {
 116                         pins = "gpio20";
 117                         function = "gpio";
 118                         drive-strength = <10>;
 119                         bias-pull-up;
 120                 };
 121         };
 122
 123         led_pins: led_pins {
 124                 mux {
 125                         pins = "gpio22", "gpio23", "gpio24", "gpio25",
 126                                     "gpio26", "gpio27", "gpio28", "gpio29";
 127                         function = "gpio";
 128                         drive-strength = <10>;
 129                         bias-pull-up;
 130                 };
 131         };
 132
 133         button_pins: button_pins {
 134                 mux {
 135                         pins = "gpio56";
 136                         function = "gpio";
 137                         bias-pull-up;
 138                 };
 139         };
 140 };
 141
 142 &gsbi2 {
 143         qcom,mode = <GSBI_PROT_I2C_UART>;
 144         status = "okay";
 145
 146         gsbi2_serial: serial@12490000 {
 147                 status = "okay";
 148         };
 149 };
 150
 151 &gsbi4 {
 152         qcom,mode = <GSBI_PROT_I2C_UART>;
 153         status = "okay";
 154
 155         serial@16340000 {
 156                 status = "disabled";
 157         };
 158 };
 159
 160 &gsbi7 {
 161         qcom,mode = <GSBI_PROT_I2C_UART>;
 162         status = "okay";
 163
 164         gsbi7_serial: serial@16640000 {
 165                 status = "okay";
 166         };
 167 };
 168
 169 &gsbi5 {
 170         qcom,mode = <GSBI_PROT_SPI>;
 171         status = "okay";
 172
 173         spi4: spi@1a280000 {
 174                 status = "okay";
 175                 spi-max-frequency = <50000000>;
 176
 177                 pinctrl-0 = <&spi_pins>;
 178                 pinctrl-names = "default";
 179
 180                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 181
 182                 flash@0 {
 183                         compatible = "jedec,spi-nor";
 184                         #address-cells = <1>;
 185                         #size-cells = <1>;
 186                         spi-max-frequency = <50000000>;
 187                         reg = <0>;
 188
 189                         partitions {
 190                                 compatible = "fixed-partitions";
 191
 192                                 cfg1@02a0000 {
 193                                         compatible = "u-boot,env-redundant-bool";
 194                                         label = "CFG1";
 195                                         reg = <0x02a0000 0x0010000>;
 196
 197                                         ethaddr: ethaddr {
 198                                         };
 199                                 };
 200
 201                                 bootpri@02b0000 {
 202                                         label = "BootPRI";
 203                                         reg = <0x02b0000 0x0080000>;
 204                                 };
 205
 206                                 cfg2@0330000 {
 207                                         label = "CFG2";
 208                                         reg = <0x0330000 0x0010000>;
 209                                 };
 210
 211                                 fs@0340000 {
 212                                         label = "FS";
 213                                         reg = <0x0340000 0x0080000>;
 214                                 };
 215
 216                                 priimg@03c0000 {
 217                                         label = "PriImg";
 218                                         reg = <0x03c0000 0x0e10000>;
 219                                 };
 220
 221                                 secimg@11d0000 {
 222                                         label = "SecImg";
 223                                         reg = <0x11d0000 0x0e10000>;
 224                                 };
 225                         };
 226                 };
 227         };
 228 };
 229
 230 &pcie0 {
 231         status = "okay";
 232
 233         /delete-property/ pinctrl-0;
 234         /delete-property/ pinctrl-names;
 235
 236         bridge@0,0 {
 237                 reg = <0x00000000 0 0 0 0>;
 238                 #address-cells = <3>;
 239                 #size-cells = <2>;
 240                 ranges;
 241
 242                 wifi@1,0 {
 243                         compatible = "qcom,ath10k";
 244                         status = "okay";
 245                         reg = <0x00010000 0 0 0 0>;
 246                 };
 247         };
 248 };
 249
 250 &pcie1 {
 251         status = "okay";
 252
 253         /delete-property/ pinctrl-0;
 254         /delete-property/ pinctrl-names;
 255
 256         bridge@0,0 {
 257                 reg = <0x00000000 0 0 0 0>;
 258                 #address-cells = <3>;
 259                 #size-cells = <2>;
 260                 ranges;
 261
 262                 wifi@1,0 {
 263                         compatible = "qcom,ath10k";
 264                         status = "okay";
 265                         reg = <0x00010000 0 0 0 0>;
 266                 };
 267         };
 268 };
 269
 270 &nand {
 271         status = "okay";
 272
 273         pinctrl-0 = <&nand_pins>;
 274         pinctrl-names = "default";
 275
 276         nand@0 {
 277                 compatible = "qcom,nandcs";
 278
 279                 reg = <0>;
 280
 281                 nand-ecc-strength = <8>;
 282                 nand-bus-width = <8>;
 283                 nand-ecc-step-size = <512>;
 284
 285                 partitions {
 286                         compatible = "fixed-partitions";
 287                         #address-cells = <1>;
 288                         #size-cells = <1>;
 289
 290                         ubi@0 {
 291                                 label = "ubi";
 292                                 reg = <0x0000000 0x20000000>;
 293                         };
 294                 };
 295         };
 296 };
 297
 298 &soc {
 299         mdio1: mdio {
 300                 compatible = "virtual,mdio-gpio";
 301                 #address-cells = <1>;
 302                 #size-cells = <0>;
 303
 304                 status = "okay";
 305
 306                 pinctrl-0 = <&mdio0_pins>;
 307                 pinctrl-names = "default";
 308
 309                 gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
 310
 311                 phy1: ethernet-phy@1 {
 312                         reg = <1>;
 313                 };
 314
 315                 phy2: ethernet-phy@2 {
 316                         reg = <2>;
 317                 };
 318         };
 319 };
 320
 321 &gmac0 {
 322         status = "okay";
 323
 324         qcom,id = <0>;
 325         mdiobus = <&mdio1>;
 326
 327         phy-mode = "rgmii";
 328         phy-handle = <&phy1>;
 329
 330         nvmem-cells = <&ethaddr>;
 331         nvmem-cell-names = "mac-address";
 332
 333         fixed-link {
 334                 speed = <1000>;
 335                 full-duplex;
 336         };
 337 };
 338
 339 &gmac2 {
 340         status = "okay";
 341
 342         qcom,id = <2>;
 343         mdiobus = <&mdio1>;
 344
 345         phy-mode = "sgmii";
 346         phy-handle = <&phy2>;
 347 };
 348
 349 &adm_dma {
 350         status = "okay";
 351 };