target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-tr4400-v2.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 #include "qcom-ipq8065-smb208.dtsi"
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         model = "Arris TR4400 v2";
   8         compatible = "arris,tr4400-v2", "qcom,ipq8065", "qcom,ipq8064";
   9
  10         memory@0 {
  11                 reg = <0x42000000 0x1e000000>;
  12                 device_type = "memory";
  13         };
  14
  15         aliases {
  16                 led-boot = &led_status_blue;
  17                 led-failsafe = &led_status_red;
  18                 led-running = &led_status_blue;
  19                 led-upgrade = &led_status_red;
  20         };
  21
  22         chosen {
  23                 bootargs = "rootfstype=squashfs noinitrd";
  24         };
  25
  26         keys {
  27                 compatible = "gpio-keys";
  28                 pinctrl-0 = <&button_pins>;
  29                 pinctrl-names = "default";
  30
  31                 reset {
  32                         label = "reset";
  33                         gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
  34                         linux,code = <KEY_RESTART>;
  35                         debounce-interval = <60>;
  36                         wakeup-source;
  37                 };
  38
  39                 wps {
  40                         label = "wps";
  41                         gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  42                         linux,code = <KEY_WPS_BUTTON>;
  43                         debounce-interval = <60>;
  44                         wakeup-source;
  45                 };
  46         };
  47
  48         leds {
  49                 compatible = "gpio-leds";
  50                 pinctrl-0 = <&led_pins>;
  51                 pinctrl-names = "default";
  52
  53                 led_status_red: status_red {
  54                         label = "red:status";
  55                         gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  56                 };
  57
  58                 led_status_blue: status_blue {
  59                         label = "blue:status";
  60                         gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  61                 };
  62         };
  63 };
  64
  65 &qcom_pinmux {
  66         button_pins: button_pins {
  67                 mux {
  68                         pins = "gpio6", "gpio54";
  69                         function = "gpio";
  70                         drive-strength = <2>;
  71                         bias-pull-up;
  72                 };
  73         };
  74
  75         led_pins: led_pins {
  76                 mux {
  77                         pins = "gpio7", "gpio8";
  78                         function = "gpio";
  79                         drive-strength = <2>;
  80                         bias-pull-down;
  81                 };
  82         };
  83
  84         rgmii2_pins: rgmii2-pins {
  85                 tx {
  86                         pins = "gpio27", "gpio28", "gpio29", "gpio30", "gpio31", "gpio32";
  87                         input-disable;
  88                 };
  89         };
  90
  91         spi_pins: spi_pins {
  92                 cs {
  93                         pins = "gpio20";
  94                         drive-strength = <12>;
  95                 };
  96         };
  97 };
  98
  99 &gsbi5 {
 100         qcom,mode = <GSBI_PROT_SPI>;
 101         status = "okay";
 102
 103         spi@1a280000 {
 104                 status = "okay";
 105
 106                 pinctrl-0 = <&spi_pins>;
 107                 pinctrl-names = "default";
 108
 109                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 110
 111                 flash@0 {
 112                         compatible = "everspin,mr25h256";
 113                         spi-max-frequency = <40000000>;
 114                         reg = <0>;
 115                 };
 116         };
 117 };
 118
 119 &nand {
 120         status = "okay";
 121
 122         nand@0 {
 123                 reg = <0>;
 124                 compatible = "qcom,nandcs";
 125
 126                 nand-ecc-strength = <4>;
 127                 nand-bus-width = <8>;
 128                 nand-ecc-step-size = <512>;
 129
 130                 qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>;
 131
 132                 partitions {
 133                         compatible = "fixed-partitions";
 134                         #address-cells = <1>;
 135                         #size-cells = <1>;
 136
 137                         partition@0 {
 138                                 label = "0:SBL1";
 139                                 reg = <0x0000000 0x0040000>;
 140                                 read-only;
 141                         };
 142                         partition@40000 {
 143                                 label = "0:MIBIB";
 144                                 reg = <0x0040000 0x0140000>;
 145                                 read-only;
 146                         };
 147                         partition@180000 {
 148                                 label = "0:SBL2";
 149                                 reg = <0x0180000 0x0140000>;
 150                                 read-only;
 151                         };
 152                         partition@2c0000 {
 153                                 label = "0:SBL3";
 154                                 reg = <0x02c0000 0x0280000>;
 155                                 read-only;
 156                         };
 157                         partition@540000 {
 158                                 label = "0:DDRCONFIG";
 159                                 reg = <0x0540000 0x0120000>;
 160                                 read-only;
 161                         };
 162                         partition@660000 {
 163                                 label = "0:SSD";
 164                                 reg = <0x0660000 0x0120000>;
 165                                 read-only;
 166                         };
 167                         partition@780000 {
 168                                 label = "0:TZ";
 169                                 reg = <0x0780000 0x0280000>;
 170                                 read-only;
 171                         };
 172                         partition@a00000 {
 173                                 label = "0:RPM";
 174                                 reg = <0x0a00000 0x0280000>;
 175                                 read-only;
 176                         };
 177                         partition@c80000 {
 178                                 label = "0:APPSBL";
 179                                 reg = <0x0c80000 0x0500000>;
 180                                 read-only;
 181                         };
 182                         partition@1180000 {
 183                                 label = "0:APPSBLENV";
 184                                 reg = <0x1180000 0x0080000>;
 185                         };
 186                         partition@1200000 {
 187                                 label = "0:ART";
 188                                 reg = <0x1200000 0x0140000>;
 189                                 read-only;
 190
 191                                 nvmem-layout {
 192                                         compatible = "fixed-layout";
 193                                         #address-cells = <1>;
 194                                         #size-cells = <1>;
 195
 196                                         precal_ART_1000: precal@1000 {
 197                                                 reg = <0x1000 0x2f20>;
 198                                         };
 199                                         precal_ART_5000: precal@5000 {
 200                                                 reg = <0x5000 0x2f20>;
 201                                         };
 202                                 };
 203                         };
 204                         stock_partition@1340000 {
 205                                 label = "stock_rootfs";
 206                                 reg = <0x1340000 0x4000000>;
 207                         };
 208                         partition@5340000 {
 209                                 label = "0:BOOTCONFIG";
 210                                 reg = <0x5340000 0x0060000>;
 211                                 read-only;
 212                         };
 213                         partition@53a0000 {
 214                                 label = "0:SBL2_1";
 215                                 reg = <0x53a0000 0x0140000>;
 216                                 read-only;
 217                         };
 218                         partition@54e0000 {
 219                                 label = "0:SBL3_1";
 220                                 reg = <0x54e0000 0x0280000>;
 221                                 read-only;
 222                         };
 223                         partition@5760000 {
 224                                 label = "0:DDRCONFIG_1";
 225                                 reg = <0x5760000 0x0120000>;
 226                                 read-only;
 227                         };
 228                         partition@5880000 {
 229                                 label = "0:SSD_1";
 230                                 reg = <0x5880000 0x0120000>;
 231                                 read-only;
 232                         };
 233                         partition@59a0000 {
 234                                 label = "0:TZ_1";
 235                                 reg = <0x59a0000 0x0280000>;
 236                                 read-only;
 237                         };
 238                         partition@5c20000 {
 239                                 label = "0:RPM_1";
 240                                 reg = <0x5c20000 0x0280000>;
 241                                 read-only;
 242                         };
 243                         partition@5ea0000 {
 244                                 label = "0:BOOTCONFIG1";
 245                                 reg = <0x5ea0000 0x0060000>;
 246                                 read-only;
 247                         };
 248                         partition@5f00000 {
 249                                 label = "0:APPSBL_1";
 250                                 reg = <0x5f00000 0x0500000>;
 251                                 read-only;
 252                         };
 253                         stock_partition@6400000 {
 254                                 label = "stock_rootfs_1";
 255                                 reg = <0x6400000 0x4000000>;
 256                         };
 257                         stock_partition@a400000 {
 258                                 label = "stock_fw_env";
 259                                 reg = <0xa400000 0x0100000>;
 260                         };
 261                         stock_partition@a500000 {
 262                                 label = "stock_config";
 263                                 reg = <0xa500000 0x0800000>;
 264                         };
 265                         stock_partition@ad00000 {
 266                                 label = "stock_PKI";
 267                                 reg = <0xad00000 0x0200000>;
 268                         };
 269                         stock_partition@af00000 {
 270                                 label = "stock_scfgmgr";
 271                                 reg = <0xaf00000 0x0100000>;
 272                         };
 273
 274                         partition@6400000 {
 275                                 label = "fw_env";
 276                                 reg = <0x6400000 0x0100000>;
 277
 278                                 nvmem-layout {
 279                                         compatible = "fixed-layout";
 280                                         #address-cells = <1>;
 281                                         #size-cells = <1>;
 282
 283                                         macaddr_fw_env_0: macaddr@0 {
 284                                                 reg = <0x00 0x6>;
 285                                         };
 286                                         macaddr_fw_env_6: macaddr@6 {
 287                                                 reg = <0x06 0x6>;
 288                                         };
 289                                         macaddr_fw_env_c: macaddr@c {
 290                                                 reg = <0x0c 0x6>;
 291                                         };
 292                                         macaddr_fw_env_12: macaddr@12 {
 293                                                 reg = <0x12 0x6>;
 294                                         };
 295                                         macaddr_fw_env_18: macaddr@18 {
 296                                                 reg = <0x18 0x6>;
 297                                         };
 298                                 };
 299                         };
 300                         partition@6500000 {
 301                                 label = "ubi";
 302                                 reg = <0x6500000 0x9b00000>;
 303                         };
 304                         partition@1340000 {
 305                                 label = "extra";
 306                                 reg = <0x1340000 0x4000000>;
 307                         };
 308                 };
 309         };
 310 };
 311
 312 &mdio0 {
 313         status = "okay";
 314
 315         pinctrl-0 = <&mdio0_pins>;
 316         pinctrl-names = "default";
 317
 318         switch@10 {
 319                 compatible = "qca,qca8337";
 320                 #address-cells = <1>;
 321                 #size-cells = <0>;
 322                 reg = <0x10>;
 323
 324                 ports {
 325                         #address-cells = <1>;
 326                         #size-cells = <0>;
 327
 328                         port@0 {
 329                                 reg = <0>;
 330                                 label = "cpu";
 331                                 ethernet = <&gmac0>;
 332                                 phy-mode = "rgmii";
 333                                 tx-internal-delay-ps = <1000>;
 334                                 rx-internal-delay-ps = <1000>;
 335
 336                                 fixed-link {
 337                                         speed = <1000>;
 338                                         full-duplex;
 339                                 };
 340                         };
 341
 342                         port@1 {
 343                                 reg = <1>;
 344                                 label = "lan1";
 345                                 phy-mode = "internal";
 346                                 phy-handle = <&phy_port1>;
 347                         };
 348
 349                         port@2 {
 350                                 reg = <2>;
 351                                 label = "lan2";
 352                                 phy-mode = "internal";
 353                                 phy-handle = <&phy_port2>;
 354                         };
 355
 356                         port@3 {
 357                                 reg = <3>;
 358                                 label = "lan3";
 359                                 phy-mode = "internal";
 360                                 phy-handle = <&phy_port3>;
 361                         };
 362
 363                         port@4 {
 364                                 reg = <4>;
 365                                 label = "lan4";
 366                                 phy-mode = "internal";
 367                                 phy-handle = <&phy_port4>;
 368                         };
 369
 370                         port@6 {
 371                                 reg = <6>;
 372                                 label = "cpu";
 373                                 ethernet = <&gmac1>;
 374                                 phy-mode = "sgmii";
 375                                 qca,sgmii-enable-pll;
 376
 377                                 fixed-link {
 378                                         speed = <1000>;
 379                                         full-duplex;
 380                                 };
 381                         };
 382                 };
 383
 384                 mdio {
 385                         #address-cells = <1>;
 386                         #size-cells = <0>;
 387
 388                         phy_port1: phy@0 {
 389                                 reg = <0>;
 390                         };
 391
 392                         phy_port2: phy@1 {
 393                                 reg = <1>;
 394                         };
 395
 396                         phy_port3: phy@2 {
 397                                 reg = <2>;
 398                         };
 399
 400                         phy_port4: phy@3 {
 401                                 reg = <3>;
 402                         };
 403                 };
 404         };
 405
 406         phy7: ethernet-phy@7 {
 407                 reg = <7>;
 408         };
 409 };
 410
 411 &gmac0 {
 412         status = "okay";
 413         phy-mode = "rgmii";
 414         qcom,id = <0>;
 415
 416         nvmem-cells = <&macaddr_fw_env_18>;
 417         nvmem-cell-names = "mac-address";
 418
 419         pinctrl-0 = <&rgmii2_pins>;
 420         pinctrl-names = "default";
 421
 422         fixed-link {
 423                 speed = <1000>;
 424                 full-duplex;
 425         };
 426 };
 427
 428 &gmac1 {
 429         status = "okay";
 430         phy-mode = "sgmii";
 431         qcom,id = <1>;
 432
 433         nvmem-cells = <&macaddr_fw_env_0>;
 434         nvmem-cell-names = "mac-address";
 435
 436         fixed-link {
 437                 speed = <1000>;
 438                 full-duplex;
 439         };
 440 };
 441
 442 &gmac3 {
 443         status = "okay";
 444         phy-mode = "sgmii";
 445         qcom,id = <3>;
 446         phy-handle = <&phy7>;
 447
 448         nvmem-cells = <&macaddr_fw_env_6>;
 449         nvmem-cell-names = "mac-address";
 450 };
 451
 452 &adm_dma {
 453         status = "okay";
 454 };
 455
 456 &hs_phy_1 {
 457         status = "okay";
 458 };
 459
 460 &ss_phy_1 {
 461         status = "okay";
 462 };
 463
 464 &usb3_1 {
 465         status = "okay";
 466 };
 467
 468 &pcie0 {
 469         status = "okay";
 470         reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
 471         pinctrl-0 = <&pcie0_pins>;
 472         pinctrl-names = "default";
 473
 474         bridge@0,0 {
 475                 reg = <0x00000000 0 0 0 0>;
 476                 #address-cells = <3>;
 477                 #size-cells = <2>;
 478                 ranges;
 479
 480                 wifi0: wifi@1,0 {
 481                         compatible = "pci168c,0046";
 482                         reg = <0x00010000 0 0 0 0>;
 483
 484                         nvmem-cells = <&precal_ART_1000>, <&macaddr_fw_env_12>;
 485                         nvmem-cell-names = "pre-calibration", "mac-address";
 486                 };
 487         };
 488 };
 489
 490 &pcie1 {
 491         status = "okay";
 492         reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
 493         pinctrl-0 = <&pcie1_pins>;
 494         pinctrl-names = "default";
 495         max-link-speed = <1>;
 496
 497         bridge@0,0 {
 498                 reg = <0x00000000 0 0 0 0>;
 499                 #address-cells = <3>;
 500                 #size-cells = <2>;
 501                 ranges;
 502
 503                 wifi1: wifi@1,0 {
 504                         compatible = "pci168c,0040";
 505                         reg = <0x00010000 0 0 0 0>;
 506
 507                         nvmem-cells = <&precal_ART_5000>, <&macaddr_fw_env_c>;
 508                         nvmem-cell-names = "pre-calibration", "mac-address";
 509                 };
 510         };
 511 };