target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts

   1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/leds/common.h>
   5
   6 / {
   7         model = "NEC Aterm WG2600HP";
   8         compatible = "nec,wg2600hp", "qcom,ipq8064";
   9
  10         memory@0 {
  11                 reg = <0x42000000 0x1e000000>;
  12                 device_type = "memory";
  13         };
  14
  15         aliases {
  16                 mdio-gpio0 = &mdio0;
  17
  18                 led-boot = &power_green;
  19                 led-failsafe = &power_red;
  20                 led-running = &power_green;
  21                 led-upgrade = &power_green;
  22         };
  23
  24         keys {
  25                 compatible = "gpio-keys";
  26                 pinctrl-0 = <&button_pins>;
  27                 pinctrl-names = "default";
  28
  29                 wps {
  30                         label = "wps";
  31                         gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
  32                         linux,code = <KEY_WPS_BUTTON>;
  33                         debounce-interval = <60>;
  34                         wakeup-source;
  35                 };
  36
  37                 reset {
  38                         label = "reset";
  39                         gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  40                         linux,code = <KEY_RESTART>;
  41                         debounce-interval = <60>;
  42                         wakeup-source;
  43                 };
  44
  45                 bridge {
  46                         label = "bridge";
  47                         gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  48                         linux,code = <BTN_0>;
  49                         linux,input-type = <EV_SW>;
  50                         debounce-interval = <60>;
  51                         wakeup-source;
  52                 };
  53
  54                 converter {
  55                         label = "converter";
  56                         gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
  57                         linux,code = <BTN_0>;
  58                         linux,input-type = <EV_SW>;
  59                         debounce-interval = <60>;
  60                         wakeup-source;
  61                 };
  62         };
  63
  64         leds {
  65                 compatible = "gpio-leds";
  66                 pinctrl-0 = <&led_pins>;
  67                 pinctrl-names = "default";
  68
  69                 converter_green {
  70                         label = "green:converter";
  71                         gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
  72                 };
  73
  74                 power_red: power_red {
  75                         function = LED_FUNCTION_POWER;
  76                         color = <LED_COLOR_ID_RED>;
  77                         gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  78                 };
  79
  80                 active_green {
  81                         label = "green:active";
  82                         gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  83                 };
  84
  85                 active_red {
  86                         label = "red:active";
  87                         gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  88                 };
  89
  90                 power_green: power_green {
  91                         function = LED_FUNCTION_POWER;
  92                         color = <LED_COLOR_ID_GREEN>;
  93                         gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
  94                 };
  95
  96                 converter_red {
  97                         label = "red:converter";
  98                         gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
  99                 };
 100
 101                 wlan2g_green {
 102                         label = "green:wlan2g";
 103                         gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
 104                 };
 105
 106                 wlan2g_red {
 107                         label = "red:wlan2g";
 108                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
 109                 };
 110
 111                 wlan5g_green {
 112                         label = "green:wlan5g";
 113                         gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
 114                 };
 115
 116                 wlan5g_red {
 117                         label = "red:wlan5g";
 118                         gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
 119                 };
 120
 121                 tv_green {
 122                         label = "green:tv";
 123                         gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
 124                 };
 125
 126                 tv_red {
 127                         label = "red:tv";
 128                         gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>;
 129                 };
 130         };
 131 };
 132
 133 &CPU_SPC {
 134         status = "disabled";
 135 };
 136
 137 &adm_dma {
 138         status = "okay";
 139 };
 140
 141 &mdio0 {
 142         status = "okay";
 143
 144         pinctrl-0 = <&mdio0_pins>;
 145         pinctrl-names = "default";
 146
 147 switch@10 {
 148                 compatible = "qca,qca8337";
 149                 #address-cells = <1>;
 150                 #size-cells = <0>;
 151                 reg = <0x10>;
 152
 153                 ports {
 154                         #address-cells = <1>;
 155                         #size-cells = <0>;
 156
 157                         port@0 {
 158                                 reg = <0>;
 159                                 label = "cpu";
 160                                 ethernet = <&gmac1>;
 161                                 phy-mode = "rgmii";
 162                                 tx-internal-delay-ps = <1000>;
 163
 164                                 fixed-link {
 165                                         speed = <1000>;
 166                                         full-duplex;
 167                                 };
 168                         };
 169
 170                         port@1 {
 171                                 reg = <1>;
 172                                 label = "wan";
 173                                 phy-mode = "internal";
 174                                 phy-handle = <&phy_port1>;
 175                         };
 176
 177                         port@2 {
 178                                 reg = <2>;
 179                                 label = "lan1";
 180                                 phy-mode = "internal";
 181                                 phy-handle = <&phy_port2>;
 182                         };
 183
 184                         port@3 {
 185                                 reg = <3>;
 186                                 label = "lan2";
 187                                 phy-mode = "internal";
 188                                 phy-handle = <&phy_port3>;
 189                         };
 190
 191                         port@4 {
 192                                 reg = <4>;
 193                                 label = "lan3";
 194                                 phy-mode = "internal";
 195                                 phy-handle = <&phy_port4>;
 196                         };
 197
 198                         port@5 {
 199                                 reg = <5>;
 200                                 label = "lan4";
 201                                 phy-mode = "internal";
 202                                 phy-handle = <&phy_port5>;
 203                         };
 204
 205                         port@6 {
 206                                 reg = <6>;
 207                                 label = "cpu";
 208                                 ethernet = <&gmac2>;
 209                                 phy-mode = "sgmii";
 210                                 qca,sgmii-enable-pll;
 211                                 qca,sgmii-rxclk-falling-edge;
 212
 213                                 fixed-link {
 214                                         speed = <1000>;
 215                                         full-duplex;
 216                                 };
 217                         };
 218                 };
 219
 220                 mdio {
 221                         #address-cells = <1>;
 222                         #size-cells = <0>;
 223
 224                         phy_port1: phy@0 {
 225                                 reg = <0>;
 226                         };
 227
 228                         phy_port2: phy@1 {
 229                                 reg = <1>;
 230                         };
 231
 232                         phy_port3: phy@2 {
 233                                 reg = <2>;
 234                         };
 235
 236                         phy_port4: phy@3 {
 237                                 reg = <3>;
 238                         };
 239
 240                         phy_port5: phy@4 {
 241                                 reg = <4>;
 242                         };
 243                 };
 244         };
 245 };
 246
 247 &gmac1 {
 248         status = "okay";
 249
 250         phy-mode = "rgmii";
 251         qcom,id = <1>;
 252
 253         pinctrl-0 = <&rgmii2_pins>;
 254         pinctrl-names = "default";
 255
 256         nvmem-cells = <&macaddr_PRODUCTDATA_6>;
 257         nvmem-cell-names = "mac-address";
 258
 259         fixed-link {
 260                 speed = <1000>;
 261                 full-duplex;
 262         };
 263 };
 264
 265 &gmac2 {
 266         status = "okay";
 267
 268         phy-mode = "sgmii";
 269         qcom,id = <2>;
 270
 271         nvmem-cells = <&macaddr_PRODUCTDATA_0>;
 272         nvmem-cell-names = "mac-address";
 273
 274         fixed-link {
 275                 speed = <1000>;
 276                 full-duplex;
 277         };
 278 };
 279
 280 &gsbi5 {
 281         status = "okay";
 282
 283         qcom,mode = <GSBI_PROT_SPI>;
 284
 285         spi@1a280000 {
 286                 status = "okay";
 287
 288                 pinctrl-0 = <&spi_pins>;
 289                 pinctrl-names = "default";
 290
 291                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 292
 293                 flash@0 {
 294                         compatible = "jedec,spi-nor";
 295                         spi-max-frequency = <50000000>;
 296                         reg = <0>;
 297
 298                         partitions {
 299                                 compatible = "fixed-partitions";
 300                                 #address-cells = <1>;
 301                                 #size-cells = <1>;
 302
 303                                 SBL1@0 {
 304                                         label = "SBL1";
 305                                         reg = <0x0 0x20000>;
 306                                         read-only;
 307                                 };
 308
 309                                 MIBIB@20000 {
 310                                         label = "MIBIB";
 311                                         reg = <0x20000 0x20000>;
 312                                         read-only;
 313                                 };
 314
 315                                 SBL2@40000 {
 316                                         label = "SBL2";
 317                                         reg = <0x40000 0x40000>;
 318                                         read-only;
 319                                 };
 320
 321                                 SBL3@80000 {
 322                                         label = "SBL3";
 323                                         reg = <0x80000 0x80000>;
 324                                         read-only;
 325                                 };
 326
 327                                 DDRCONFIG@100000 {
 328                                         label = "DDRCONFIG";
 329                                         reg = <0x100000 0x10000>;
 330                                         read-only;
 331                                 };
 332
 333                                 SSD@110000 {
 334                                         label = "SSD";
 335                                         reg = <0x110000 0x10000>;
 336                                         read-only;
 337                                 };
 338
 339                                 TZ@120000 {
 340                                         label = "TZ";
 341                                         reg = <0x120000 0x80000>;
 342                                         read-only;
 343                                 };
 344
 345                                 RPM@1a0000 {
 346                                         label = "RPM";
 347                                         reg = <0x1a0000 0x80000>;
 348                                         read-only;
 349                                 };
 350
 351                                 APPSBL@220000 {
 352                                         label = "APPSBL";
 353                                         reg = <0x220000 0x80000>;
 354                                         read-only;
 355                                 };
 356
 357                                 APPSBLENV@2a0000 {
 358                                         label = "APPSBLENV";
 359                                         reg = <0x2a0000 0x10000>;
 360                                 };
 361
 362                                 PRODUCTDATA: PRODUCTDATA@2b0000 {
 363                                         label = "PRODUCTDATA";
 364                                         reg = <0x2b0000 0x30000>;
 365                                         read-only;
 366
 367                                         nvmem-layout {
 368                                                 compatible = "fixed-layout";
 369                                                 #address-cells = <1>;
 370                                                 #size-cells = <1>;
 371
 372                                                 macaddr_PRODUCTDATA_0: macaddr@0 {
 373                                                         reg = <0x0 0x6>;
 374                                                 };
 375
 376                                                 macaddr_PRODUCTDATA_6: macaddr@6 {
 377                                                         reg = <0x6 0x6>;
 378                                                 };
 379
 380                                                 macaddr_PRODUCTDATA_c: macaddr@c {
 381                                                         reg = <0xc 0x6>;
 382                                                 };
 383
 384                                                 macaddr_PRODUCTDATA_12: macaddr@12 {
 385                                                         reg = <0x12 0x6>;
 386                                                 };
 387                                         };
 388                                 };
 389
 390                                 ART@2e0000 {
 391                                         label = "ART";
 392                                         reg = <0x2e0000 0x40000>;
 393                                         read-only;
 394
 395                                         nvmem-layout {
 396                                                 compatible = "fixed-layout";
 397                                                 #address-cells = <1>;
 398                                                 #size-cells = <1>;
 399
 400                                                 precal_ART_1000: precal@1000 {
 401                                                         reg = <0x1000 0x2f20>;
 402                                                 };
 403
 404                                                 precal_ART_5000: precal@5000 {
 405                                                         reg = <0x5000 0x2f20>;
 406                                                 };
 407                                         };
 408                                 };
 409
 410                                 TP@320000 {
 411                                         label = "TP";
 412                                         reg = <0x320000 0x40000>;
 413                                         read-only;
 414                                 };
 415
 416                                 TINY@360000 {
 417                                         label = "TINY";
 418                                         reg = <0x360000 0x500000>;
 419                                         read-only;
 420                                 };
 421
 422                                 firmware@860000 {
 423                                         compatible = "denx,uimage";
 424                                         label = "firmware";
 425                                         reg = <0x860000 0x17a0000>;
 426                                 };
 427                         };
 428                 };
 429         };
 430 };
 431
 432 &hs_phy_0 {
 433         status = "okay";
 434 };
 435
 436 &ss_phy_0 {
 437         status = "okay";
 438 };
 439
 440 &usb3_0 {
 441         status = "okay";
 442
 443         pinctrl-0 = <&usb_pwr_en_pins>;
 444         pinctrl-names = "default";
 445 };
 446
 447 &hs_phy_1 {
 448         status = "okay";
 449 };
 450
 451 &ss_phy_1 {
 452         status = "okay";
 453 };
 454
 455 &usb3_1 {
 456         status = "okay";
 457 };
 458
 459 &pcie0 {
 460         status = "okay";
 461
 462         bridge@0,0 {
 463                 reg = <0x00000000 0 0 0 0>;
 464                 #address-cells = <3>;
 465                 #size-cells = <2>;
 466                 ranges;
 467
 468                 wifi@1,0 {
 469                         compatible = "pci168c,0040";
 470                         reg = <0x00010000 0 0 0 0>;
 471
 472                         nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
 473                         nvmem-cell-names = "mac-address", "pre-calibration";
 474                 };
 475         };
 476 };
 477
 478 &pcie1 {
 479         status = "okay";
 480         max-link-speed = <1>;
 481
 482         bridge@0,0 {
 483                 reg = <0x00000000 0 0 0 0>;
 484                 #address-cells = <3>;
 485                 #size-cells = <2>;
 486                 ranges;
 487
 488                 wifi@1,0 {
 489                         compatible = "pci168c,0040";
 490                         reg = <0x00010000 0 0 0 0>;
 491
 492                         nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
 493                         nvmem-cell-names = "mac-address", "pre-calibration";
 494                 };
 495         };
 496 };
 497
 498 &qcom_pinmux {
 499         button_pins: button_pins {
 500                 mux {
 501                         pins = "gpio16", "gpio54", "gpio24", "gpio25";
 502                         function = "gpio";
 503                         drive-strength = <2>;
 504                         bias-pull-up;
 505                 };
 506         };
 507
 508         led_pins: led_pins {
 509                 mux {
 510                         pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14",
 511                                 "gpio15", "gpio55", "gpio56", "gpio57", "gpio58",
 512                                 "gpio64", "gpio65";
 513                         function = "gpio";
 514                         drive-strength = <2>;
 515                         bias-pull-down;
 516                 };
 517         };
 518
 519         spi_pins: spi_pins {
 520                 mux {
 521                         pins = "gpio18", "gpio19", "gpio21";
 522                         function = "gsbi5";
 523                         bias-pull-down;
 524                 };
 525
 526                 data {
 527                         pins = "gpio18", "gpio19";
 528                         drive-strength = <10>;
 529                 };
 530
 531                 cs {
 532                         pins = "gpio20";
 533                         drive-strength = <10>;
 534                         bias-pull-up;
 535                 };
 536
 537                 clk {
 538                         pins = "gpio21";
 539                         drive-strength = <12>;
 540                 };
 541         };
 542
 543         usb_pwr_en_pins: usb_pwr_en_pins {
 544                 mux {
 545                         pins = "gpio22";
 546                         function = "gpio";
 547                         drive-strength = <2>;
 548                         bias-pull-down;
 549                         output-high;
 550                 };
 551         };
 552 };