target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts

   1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         model = "TP-Link Archer VR2600v";
   7         compatible = "tplink,vr2600v", "qcom,ipq8064";
   8
   9         memory@0 {
  10                 reg = <0x42000000 0x1e000000>;
  11                 device_type = "memory";
  12         };
  13
  14         aliases {
  15                 mdio-gpio0 = &mdio0;
  16
  17                 led-boot = &power;
  18                 led-failsafe = &general;
  19                 led-running = &power;
  20                 led-upgrade = &general;
  21         };
  22
  23         keys {
  24                 compatible = "gpio-keys";
  25                 pinctrl-0 = <&button_pins>;
  26                 pinctrl-names = "default";
  27
  28                 wifi {
  29                         label = "wifi";
  30                         gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_RFKILL>;
  32                         debounce-interval = <60>;
  33                         wakeup-source;
  34                 };
  35
  36                 reset {
  37                         label = "reset";
  38                         gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
  39                         linux,code = <KEY_RESTART>;
  40                         debounce-interval = <60>;
  41                         wakeup-source;
  42                 };
  43
  44                 wps {
  45                         label = "wps";
  46                         gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
  47                         linux,code = <KEY_WPS_BUTTON>;
  48                         debounce-interval = <60>;
  49                         wakeup-source;
  50                 };
  51
  52                 dect {
  53                         label = "dect";
  54                         gpios = <&qcom_pinmux 67 GPIO_ACTIVE_LOW>;
  55                         linux,code = <KEY_PHONE>;
  56                         debounce-interval = <60>;
  57                         wakeup-source;
  58                 };
  59
  60                 ledswitch {
  61                         label = "ledswitch";
  62                         gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
  63                         linux,code = <KEY_LIGHTS_TOGGLE>;
  64                         debounce-interval = <60>;
  65                         wakeup-source;
  66                 };
  67         };
  68
  69         leds {
  70                 compatible = "gpio-leds";
  71                 pinctrl-0 = <&led_pins>;
  72                 pinctrl-names = "default";
  73
  74                 dsl {
  75                         label = "white:dsl";
  76                         gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  77                 };
  78
  79                 usb {
  80                         label = "white:usb";
  81                         gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  82                 };
  83
  84                 lan {
  85                         label = "white:lan";
  86                         gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  87                 };
  88
  89                 wlan2g {
  90                         label = "white:wlan2g";
  91                         gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
  92                 };
  93
  94                 wlan5g {
  95                         label = "white:wlan5g";
  96                         gpios = <&qcom_pinmux 17 GPIO_ACTIVE_HIGH>;
  97                 };
  98
  99                 power: power {
 100                         label = "white:power";
 101                         gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
 102                         default-state = "keep";
 103                 };
 104
 105                 phone {
 106                         label = "white:phone";
 107                         gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
 108                 };
 109
 110                 wan {
 111                         label = "white:wan";
 112                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
 113                 };
 114
 115                 general: general {
 116                         label = "white:general";
 117                         gpios = <&qcom_pinmux 66 GPIO_ACTIVE_HIGH>;
 118                 };
 119         };
 120 };
 121
 122 &qcom_pinmux {
 123         led_pins: led_pins {
 124                 mux {
 125                         pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio17",
 126                                 "gpio26", "gpio53", "gpio56", "gpio66";
 127                         function = "gpio";
 128                         drive-strength = <2>;
 129                         bias-pull-up;
 130                 };
 131         };
 132
 133         button_pins: button_pins {
 134                 mux {
 135                         pins = "gpio54", "gpio64", "gpio65", "gpio67", "gpio68";
 136                         function = "gpio";
 137                         drive-strength = <2>;
 138                         bias-pull-up;
 139                 };
 140         };
 141
 142         spi_pins: spi_pins {
 143                 mux {
 144                         pins = "gpio18", "gpio19", "gpio21";
 145                         function = "gsbi5";
 146                         bias-pull-down;
 147                 };
 148
 149                 data {
 150                         pins = "gpio18", "gpio19";
 151                         drive-strength = <10>;
 152                 };
 153
 154                 cs {
 155                         pins = "gpio20";
 156                         drive-strength = <10>;
 157                         bias-pull-up;
 158                 };
 159
 160                 clk {
 161                         pins = "gpio21";
 162                         drive-strength = <12>;
 163                 };
 164         };
 165 };
 166
 167 &gsbi5 {
 168         qcom,mode = <GSBI_PROT_SPI>;
 169         status = "okay";
 170
 171         spi4: spi@1a280000 {
 172                 status = "okay";
 173
 174                 pinctrl-0 = <&spi_pins>;
 175                 pinctrl-names = "default";
 176
 177                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 178
 179                 flash@0 {
 180                         compatible = "jedec,spi-nor";
 181                         #address-cells = <1>;
 182                         #size-cells = <1>;
 183                         spi-max-frequency = <50000000>;
 184                         reg = <0>;
 185
 186                         partitions {
 187                                 compatible = "fixed-partitions";
 188                                 #address-cells = <1>;
 189                                 #size-cells = <1>;
 190
 191                                 partition@0 {
 192                                         label = "SBL1";
 193                                         reg = <0x0 0x20000>;
 194                                         read-only;
 195                                 };
 196
 197                                 partition@20000 {
 198                                         label = "MIBIB";
 199                                         reg = <0x20000 0x20000>;
 200                                         read-only;
 201                                 };
 202
 203                                 partition@40000 {
 204                                         label = "SBL2";
 205                                         reg = <0x40000 0x40000>;
 206                                         read-only;
 207                                 };
 208
 209                                 partition@80000 {
 210                                         label = "SBL3";
 211                                         reg = <0x80000 0x80000>;
 212                                         read-only;
 213                                 };
 214
 215                                 partition@100000 {
 216                                         label = "DDRCONFIG";
 217                                         reg = <0x100000 0x10000>;
 218                                         read-only;
 219                                 };
 220
 221                                 partition@110000 {
 222                                         label = "SSD";
 223                                         reg = <0x110000 0x10000>;
 224                                         read-only;
 225                                 };
 226
 227                                 partition@120000 {
 228                                         label = "TZ";
 229                                         reg = <0x120000 0x80000>;
 230                                         read-only;
 231                                 };
 232
 233                                 partition@1a0000 {
 234                                         label = "RPM";
 235                                         reg = <0x1a0000 0x80000>;
 236                                         read-only;
 237                                 };
 238
 239                                 partition@220000 {
 240                                         label = "APPSBL";
 241                                         reg = <0x220000 0x80000>;
 242                                         read-only;
 243                                 };
 244
 245                                 partition@2a0000 {
 246                                         label = "APPSBLENV";
 247                                         reg = <0x2a0000 0x40000>;
 248                                         read-only;
 249                                 };
 250
 251                                 partition@2e0000 {
 252                                         label = "OLDART";
 253                                         reg = <0x2e0000 0x40000>;
 254                                         read-only;
 255                                 };
 256
 257                                 partition@320000 {
 258                                         label = "firmware";
 259                                         reg = <0x320000 0xc60000>;
 260                                         compatible = "openwrt,uimage";
 261                                         openwrt,offset = <512>; /* account for pad-extra 512 */
 262                                 };
 263
 264                                 /* hole 0xf80000 - 0xfaf100 */
 265
 266                                 partition@faf100 {
 267                                         label = "default-mac";
 268                                         reg = <0xfaf100 0x00200>;
 269                                         read-only;
 270
 271                                         nvmem-layout {
 272                                                 compatible = "fixed-layout";
 273                                                 #address-cells = <1>;
 274                                                 #size-cells = <1>;
 275
 276                                                 macaddr_defaultmac_0: macaddr@0 {
 277                                                         compatible = "mac-base";
 278                                                         reg = <0x0 0x6>;
 279                                                         #nvmem-cell-cells = <1>;
 280                                                 };
 281                                         };
 282                                 };
 283
 284                                 partition@fc0000 {
 285                                         label = "ART";
 286                                         reg = <0xfc0000 0x40000>;
 287                                         read-only;
 288
 289                                         nvmem-layout {
 290                                                 compatible = "fixed-layout";
 291                                                 #address-cells = <1>;
 292                                                 #size-cells = <1>;
 293
 294                                                 precal_ART_1000: precal@1000 {
 295                                                         reg = <0x1000 0x2f20>;
 296                                                 };
 297
 298                                                 precal_ART_5000: precal@5000 {
 299                                                         reg = <0x5000 0x2f20>;
 300                                                 };
 301                                         };
 302                                 };
 303                         };
 304                 };
 305         };
 306 };
 307
 308 &hs_phy_0 {
 309         status = "okay";
 310 };
 311
 312 &ss_phy_0 {
 313         status = "okay";
 314 };
 315
 316 &usb3_0 {
 317         status = "okay";
 318 };
 319
 320 &hs_phy_1 {
 321         status = "okay";
 322 };
 323
 324 &ss_phy_1 {
 325         status = "okay";
 326 };
 327
 328 &usb3_1 {
 329         status = "okay";
 330 };
 331
 332 &pcie0 {
 333         status = "okay";
 334
 335         bridge@0,0 {
 336                 reg = <0x00000000 0 0 0 0>;
 337                 #address-cells = <3>;
 338                 #size-cells = <2>;
 339                 ranges;
 340
 341                 wifi@1,0 {
 342                         compatible = "pci168c,0040";
 343                         reg = <0x00010000 0 0 0 0>;
 344
 345                         nvmem-cells = <&macaddr_defaultmac_0 (-1)>, <&precal_ART_1000>;
 346                         nvmem-cell-names = "mac-address", "pre-calibration";
 347                 };
 348         };
 349 };
 350
 351 &pcie1 {
 352         status = "okay";
 353         max-link-speed = <1>;
 354
 355         bridge@0,0 {
 356                 reg = <0x00000000 0 0 0 0>;
 357                 #address-cells = <3>;
 358                 #size-cells = <2>;
 359                 ranges;
 360
 361                 wifi@1,0 {
 362                         compatible = "pci168c,0040";
 363                         reg = <0x00010000 0 0 0 0>;
 364
 365                         nvmem-cells = <&macaddr_defaultmac_0 0>, <&precal_ART_5000>;
 366                         nvmem-cell-names = "mac-address", "pre-calibration";
 367                 };
 368         };
 369 };
 370
 371 &mdio0 {
 372         status = "okay";
 373
 374         pinctrl-0 = <&mdio0_pins>;
 375         pinctrl-names = "default";
 376
 377         switch@10 {
 378                 compatible = "qca,qca8337";
 379                 #address-cells = <1>;
 380                 #size-cells = <0>;
 381                 reg = <0x10>;
 382
 383                 ports {
 384                         #address-cells = <1>;
 385                         #size-cells = <0>;
 386
 387                         port@0 {
 388                                 reg = <0>;
 389                                 label = "cpu";
 390                                 ethernet = <&gmac1>;
 391                                 phy-mode = "rgmii";
 392                                 tx-internal-delay-ps = <1000>;
 393                                 rx-internal-delay-ps = <1000>;
 394
 395                                 fixed-link {
 396                                         speed = <1000>;
 397                                         full-duplex;
 398                                 };
 399                         };
 400
 401                         port@1 {
 402                                 reg = <1>;
 403                                 label = "lan4";
 404                                 phy-mode = "internal";
 405                                 phy-handle = <&phy_port1>;
 406                         };
 407
 408                         port@2 {
 409                                 reg = <2>;
 410                                 label = "lan3";
 411                                 phy-mode = "internal";
 412                                 phy-handle = <&phy_port2>;
 413                         };
 414
 415                         port@3 {
 416                                 reg = <3>;
 417                                 label = "lan2";
 418                                 phy-mode = "internal";
 419                                 phy-handle = <&phy_port3>;
 420                         };
 421
 422                         port@4 {
 423                                 reg = <4>;
 424                                 label = "lan1";
 425                                 phy-mode = "internal";
 426                                 phy-handle = <&phy_port4>;
 427                         };
 428
 429                         port@5 {
 430                                 reg = <5>;
 431                                 label = "wan";
 432                                 phy-mode = "internal";
 433                                 phy-handle = <&phy_port5>;
 434                         };
 435
 436                         port@6 {
 437                                 reg = <6>;
 438                                 label = "cpu";
 439                                 ethernet = <&gmac2>;
 440                                 phy-mode = "sgmii";
 441                                 qca,sgmii-enable-pll;
 442
 443                                 fixed-link {
 444                                         speed = <1000>;
 445                                         full-duplex;
 446                                 };
 447                         };
 448                 };
 449
 450                 mdio {
 451                         #address-cells = <1>;
 452                         #size-cells = <0>;
 453
 454                         phy_port1: phy@0 {
 455                                 reg = <0>;
 456                         };
 457
 458                         phy_port2: phy@1 {
 459                                 reg = <1>;
 460                         };
 461
 462                         phy_port3: phy@2 {
 463                                 reg = <2>;
 464                         };
 465
 466                         phy_port4: phy@3 {
 467                                 reg = <3>;
 468                         };
 469
 470                         phy_port5: phy@4 {
 471                                 reg = <4>;
 472                         };
 473                 };
 474         };
 475 };
 476
 477 &gmac1 {
 478         status = "okay";
 479         phy-mode = "rgmii";
 480         qcom,id = <1>;
 481
 482         pinctrl-0 = <&rgmii2_pins>;
 483         pinctrl-names = "default";
 484
 485         nvmem-cells = <&macaddr_defaultmac_0 1>;
 486         nvmem-cell-names = "mac-address";
 487
 488         fixed-link {
 489                 speed = <1000>;
 490                 full-duplex;
 491         };
 492 };
 493
 494 &gmac2 {
 495         status = "okay";
 496         phy-mode = "sgmii";
 497         qcom,id = <2>;
 498
 499         nvmem-cells = <&macaddr_defaultmac_0 0>;
 500         nvmem-cell-names = "mac-address";
 501
 502         fixed-link {
 503                 speed = <1000>;
 504                 full-duplex;
 505         };
 506 };
 507
 508 &adm_dma {
 509         status = "okay";
 510 };