6c52d51ebc17e92e24d6c3a9e978e0ea49fd432c
[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-r7500v2.dts
1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/leds/common.h>
5
6 / {
7 model = "Netgear Nighthawk X4 R7500v2";
8 compatible = "netgear,r7500v2", "qcom,ipq8064";
9
10 memory@0 {
11 reg = <0x42000000 0x1e000000>;
12 device_type = "memory";
13 };
14
15 reserved-memory {
16 rsvd@5fe00000 {
17 reg = <0x5fe00000 0x200000>;
18 reusable;
19 };
20 };
21
22 aliases {
23 mdio-gpio0 = &mdio0;
24
25 led-boot = &power;
26 led-failsafe = &power;
27 led-running = &power;
28 led-upgrade = &power;
29 };
30
31 chosen {
32 bootargs = "rootfstype=squashfs noinitrd";
33 };
34
35 keys {
36 compatible = "gpio-keys";
37 pinctrl-0 = <&button_pins>;
38 pinctrl-names = "default";
39
40 wifi {
41 label = "wifi";
42 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
43 linux,code = <KEY_RFKILL>;
44 debounce-interval = <60>;
45 wakeup-source;
46 };
47
48 reset {
49 label = "reset";
50 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
51 linux,code = <KEY_RESTART>;
52 debounce-interval = <60>;
53 wakeup-source;
54 };
55
56 wps {
57 label = "wps";
58 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
59 linux,code = <KEY_WPS_BUTTON>;
60 debounce-interval = <60>;
61 wakeup-source;
62 };
63 };
64
65 leds {
66 compatible = "gpio-leds";
67 pinctrl-0 = <&led_pins>;
68 pinctrl-names = "default";
69
70 usb1 {
71 label = "amber:usb1";
72 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
73 };
74
75 usb3 {
76 label = "amber:usb3";
77 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
78 };
79
80 status {
81 function = LED_FUNCTION_STATUS;
82 color = <LED_COLOR_ID_AMBER>;
83 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
84 };
85
86 internet {
87 label = "white:internet";
88 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
89 };
90
91 wan {
92 function = LED_FUNCTION_WAN;
93 color = <LED_COLOR_ID_WHITE>;
94 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
95 };
96
97 wps {
98 function = LED_FUNCTION_WPS;
99 color = <LED_COLOR_ID_WHITE>;
100 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
101 };
102
103 esata {
104 label = "white:esata";
105 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
106 };
107
108 power: power {
109 function = LED_FUNCTION_POWER;
110 color = <LED_COLOR_ID_WHITE>;
111 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
112 default-state = "keep";
113 };
114
115 wifi {
116 label = "white:wifi";
117 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
118 };
119 };
120 };
121
122 &adm_dma {
123 status = "okay";
124 };
125
126 &qcom_pinmux {
127 button_pins: button_pins {
128 mux {
129 pins = "gpio6", "gpio54", "gpio65";
130 function = "gpio";
131 drive-strength = <2>;
132 bias-pull-up;
133 };
134 };
135
136 led_pins: led_pins {
137 mux {
138 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
139 "gpio24","gpio26", "gpio53", "gpio64";
140 function = "gpio";
141 drive-strength = <2>;
142 bias-pull-up;
143 };
144 };
145
146 usb0_pwr_en_pins: usb0_pwr_en_pins {
147 mux {
148 pins = "gpio15";
149 function = "gpio";
150 drive-strength = <12>;
151 bias-pull-down;
152 output-high;
153 };
154 };
155
156 usb1_pwr_en_pins: usb1_pwr_en_pins {
157 mux {
158 pins = "gpio16", "gpio68";
159 function = "gpio";
160 drive-strength = <12>;
161 bias-pull-down;
162 output-high;
163 };
164 };
165 };
166
167 &sata_phy {
168 status = "okay";
169 };
170
171 &sata {
172 status = "okay";
173 };
174
175 &hs_phy_0 {
176 status = "okay";
177 };
178
179 &ss_phy_0 {
180 status = "okay";
181 };
182
183 &usb3_0 {
184 status = "okay";
185
186 pinctrl-0 = <&usb0_pwr_en_pins>;
187 pinctrl-names = "default";
188 };
189
190 &hs_phy_1 {
191 status = "okay";
192 };
193
194 &ss_phy_1 {
195 status = "okay";
196 };
197
198 &usb3_1 {
199 status = "okay";
200
201 pinctrl-0 = <&usb1_pwr_en_pins>;
202 pinctrl-names = "default";
203 };
204
205 &pcie0 {
206 status = "okay";
207 reset-gpios = <&qcom_pinmux 3 GPIO_ACTIVE_LOW>;
208 pinctrl-0 = <&pcie0_pins>;
209 pinctrl-names = "default";
210
211 bridge@0,0 {
212 reg = <0x00000000 0 0 0 0>;
213 #address-cells = <3>;
214 #size-cells = <2>;
215 ranges;
216
217 wifi@1,0 {
218 compatible = "pci168c,0040";
219 reg = <0x00010000 0 0 0 0>;
220
221 nvmem-cells = <&macaddr_art_6 1>, <&precal_art_1000>;
222 nvmem-cell-names = "mac-address", "pre-calibration";
223 };
224 };
225 };
226
227 &pcie1 {
228 status = "okay";
229 reset-gpios = <&qcom_pinmux 48 GPIO_ACTIVE_LOW>;
230 pinctrl-0 = <&pcie1_pins>;
231 pinctrl-names = "default";
232 max-link-speed = <1>;
233
234 bridge@0,0 {
235 reg = <0x00000000 0 0 0 0>;
236 #address-cells = <3>;
237 #size-cells = <2>;
238 ranges;
239
240 wifi@1,0 {
241 compatible = "pci168c,0040";
242 reg = <0x00010000 0 0 0 0>;
243
244 nvmem-cells = <&macaddr_art_6 2>, <&precal_art_5000>;
245 nvmem-cell-names = "mac-address", "pre-calibration";
246 };
247 };
248 };
249
250 &nand {
251 status = "okay";
252
253 nand@0 {
254 reg = <0>;
255 compatible = "qcom,nandcs";
256
257 nand-ecc-strength = <4>;
258 nand-bus-width = <8>;
259 nand-ecc-step-size = <512>;
260
261 nand-is-boot-medium;
262 qcom,boot-partitions = <0x0 0x1180000>;
263
264 partitions {
265 compatible = "fixed-partitions";
266 #address-cells = <1>;
267 #size-cells = <1>;
268
269 qcadata@0 {
270 label = "qcadata";
271 reg = <0x0000000 0x0c80000>;
272 read-only;
273 };
274
275 APPSBL@c80000 {
276 label = "APPSBL";
277 reg = <0x0c80000 0x0500000>;
278 read-only;
279 };
280
281 APPSBLENV@1180000 {
282 label = "APPSBLENV";
283 reg = <0x1180000 0x0080000>;
284 read-only;
285 };
286
287 art@1200000 {
288 label = "art";
289 reg = <0x1200000 0x0140000>;
290 read-only;
291
292 nvmem-layout {
293 compatible = "fixed-layout";
294 #address-cells = <1>;
295 #size-cells = <1>;
296
297 macaddr_art_0: macaddr@0 {
298 reg = <0x0 0x6>;
299 };
300
301 macaddr_art_6: macaddr@6 {
302 compatible = "mac-base";
303 reg = <0x6 0x6>;
304 #nvmem-cell-cells = <1>;
305 };
306
307 precal_art_1000: precal@1000 {
308 reg = <0x1000 0x2f20>;
309 };
310
311 precal_art_5000: precal@5000 {
312 reg = <0x5000 0x2f20>;
313 };
314 };
315 };
316
317 artbak: art@1340000 {
318 label = "artbak";
319 reg = <0x1340000 0x0140000>;
320 read-only;
321 };
322
323 kernel@1480000 {
324 label = "kernel";
325 reg = <0x1480000 0x0400000>;
326 };
327
328 ubi@1880000 {
329 label = "ubi";
330 reg = <0x1880000 0x6080000>;
331 };
332
333 reserve@7900000 {
334 label = "reserve";
335 reg = <0x7900000 0x0700000>;
336 read-only;
337 };
338 };
339 };
340 };
341
342 &mdio0 {
343 status = "okay";
344
345 pinctrl-0 = <&mdio0_pins>;
346 pinctrl-names = "default";
347
348 switch@10 {
349 compatible = "qca,qca8337";
350 #address-cells = <1>;
351 #size-cells = <0>;
352 reg = <0x10>;
353
354 ports {
355 #address-cells = <1>;
356 #size-cells = <0>;
357
358 port@0 {
359 reg = <0>;
360 label = "cpu";
361 ethernet = <&gmac1>;
362 phy-mode = "rgmii";
363 tx-internal-delay-ps = <1000>;
364 rx-internal-delay-ps = <1000>;
365
366 fixed-link {
367 speed = <1000>;
368 full-duplex;
369 };
370 };
371
372 port@1 {
373 reg = <1>;
374 label = "lan1";
375 phy-mode = "internal";
376 phy-handle = <&phy_port1>;
377 };
378
379 port@2 {
380 reg = <2>;
381 label = "lan2";
382 phy-mode = "internal";
383 phy-handle = <&phy_port2>;
384 };
385
386 port@3 {
387 reg = <3>;
388 label = "lan3";
389 phy-mode = "internal";
390 phy-handle = <&phy_port3>;
391 };
392
393 port@4 {
394 reg = <4>;
395 label = "lan4";
396 phy-mode = "internal";
397 phy-handle = <&phy_port4>;
398 };
399
400 port@5 {
401 reg = <5>;
402 label = "wan";
403 phy-mode = "internal";
404 phy-handle = <&phy_port5>;
405 };
406
407 port@6 {
408 reg = <6>;
409 label = "cpu";
410 ethernet = <&gmac2>;
411 phy-mode = "sgmii";
412 qca,sgmii-enable-pll;
413
414 fixed-link {
415 speed = <1000>;
416 full-duplex;
417 };
418 };
419 };
420
421 mdio {
422 #address-cells = <1>;
423 #size-cells = <0>;
424
425 phy_port1: phy@0 {
426 reg = <0>;
427 };
428
429 phy_port2: phy@1 {
430 reg = <1>;
431 };
432
433 phy_port3: phy@2 {
434 reg = <2>;
435 };
436
437 phy_port4: phy@3 {
438 reg = <3>;
439 };
440
441 phy_port5: phy@4 {
442 reg = <4>;
443 };
444 };
445 };
446 };
447
448 &gmac1 {
449 status = "okay";
450 phy-mode = "rgmii";
451 qcom,id = <1>;
452
453 pinctrl-0 = <&rgmii2_pins>;
454 pinctrl-names = "default";
455
456 nvmem-cells = <&macaddr_art_6 0>;
457 nvmem-cell-names = "mac-address";
458
459 fixed-link {
460 speed = <1000>;
461 full-duplex;
462 };
463 };
464
465 &gmac2 {
466 status = "okay";
467 phy-mode = "sgmii";
468 qcom,id = <2>;
469
470 nvmem-cells = <&macaddr_art_0>;
471 nvmem-cell-names = "mac-address";
472
473 fixed-link {
474 speed = <1000>;
475 full-duplex;
476 };
477 };