kernel/ipq806x: Restore kernel files for v6.1
[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-onhub.dtsi
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2014 The ChromiumOS Authors
4 */
5
6 #include "qcom-ipq8064-smb208.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/soc/qcom,tcsr.h>
10
11 / {
12 aliases {
13 ethernet0 = &gmac0;
14 ethernet1 = &gmac2;
15 mdio-gpio0 = &mdio;
16 serial0 = &gsbi4_serial;
17 };
18
19 chosen {
20 stdout-path = "serial0:115200n8";
21 };
22
23 reserved-memory {
24 #address-cells = <1>;
25 #size-cells = <1>;
26 ranges;
27
28 rsvd@41200000 {
29 reg = <0x41200000 0x300000>;
30 no-map;
31 };
32 };
33
34 keys {
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
38
39 reset {
40 label = "reset";
41 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RESTART>;
43 debounce-interval = <60>;
44 wakeup-source;
45 };
46
47 dev {
48 label = "dev";
49 gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_CONFIG>;
51 debounce-interval = <60>;
52 wakeup-source;
53 };
54 };
55
56 mdio: mdio {
57 compatible = "virtual,mdio-gpio";
58 #address-cells = <1>;
59 #size-cells = <0>;
60 gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
61 <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
62 pinctrl-0 = <&mdio_pins>;
63 pinctrl-names = "default";
64
65 switch@10 {
66 compatible = "qca,qca8337";
67 #address-cells = <1>;
68 #size-cells = <0>;
69 reg = <0x10>;
70
71 ports {
72 #address-cells = <1>;
73 #size-cells = <0>;
74
75 port@0 {
76 reg = <0>;
77 label = "cpu";
78 ethernet = <&gmac0>;
79 phy-mode = "rgmii";
80 tx-internal-delay-ps = <1000>;
81 rx-internal-delay-ps = <1000>;
82
83 fixed-link {
84 speed = <1000>;
85 full-duplex;
86 };
87 };
88
89 port@1 {
90 reg = <1>;
91 label = "lan1";
92 phy-mode = "internal";
93 phy-handle = <&phy_port1>;
94 };
95
96 port@2 {
97 reg = <2>;
98 label = "wan";
99 phy-mode = "internal";
100 phy-handle = <&phy_port2>;
101 };
102
103 port@6 {
104 reg = <6>;
105 label = "cpu";
106 ethernet = <&gmac2>;
107 phy-mode = "sgmii";
108 qca,sgmii-enable-pll;
109
110 fixed-link {
111 speed = <1000>;
112 full-duplex;
113 };
114 };
115 };
116
117 mdio {
118 #address-cells = <1>;
119 #size-cells = <0>;
120
121 phy_port1: phy@0 {
122 reg = <0>;
123 };
124
125 phy_port2: phy@1 {
126 reg = <1>;
127 };
128 };
129 };
130 };
131
132 soc {
133 rng@1a500000 {
134 status = "disabled";
135 };
136
137 sound {
138 compatible = "google,storm-audio";
139 qcom,model = "ipq806x-storm";
140 cpu = <&lpass>;
141 codec = <&max98357a>;
142 };
143
144 lpass: lpass@28100000 {
145 status = "okay";
146 pinctrl-names = "default", "idle";
147 pinctrl-0 = <&mi2s_default>;
148 pinctrl-1 = <&mi2s_idle>;
149 };
150
151 max98357a: max98357a {
152 compatible = "maxim,max98357a";
153 #sound-dai-cells = <1>;
154 pinctrl-names = "default";
155 pinctrl-0 = <&sdmode_pins>;
156 sdmode-gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
157 };
158 };
159 };
160
161 &qcom_pinmux {
162 rgmii0_pins: rgmii0_pins {
163 mux {
164 pins = "gpio2", "gpio66";
165 drive-strength = <8>;
166 bias-disable;
167 };
168 };
169 mi2s_pins {
170 mi2s_default: mi2s_default {
171 dout {
172 pins = "gpio32";
173 function = "mi2s";
174 drive-strength = <16>;
175 bias-disable;
176 };
177 sync {
178 pins = "gpio27";
179 function = "mi2s";
180 drive-strength = <16>;
181 bias-disable;
182 };
183 clk {
184 pins = "gpio28";
185 function = "mi2s";
186 drive-strength = <16>;
187 bias-disable;
188 };
189 };
190 mi2s_idle: mi2s_idle {
191 dout {
192 pins = "gpio32";
193 function = "mi2s";
194 drive-strength = <2>;
195 bias-pull-down;
196 };
197 sync {
198 pins = "gpio27";
199 function = "mi2s";
200 drive-strength = <2>;
201 bias-pull-down;
202 };
203 clk {
204 pins = "gpio28";
205 function = "mi2s";
206 drive-strength = <2>;
207 bias-pull-down;
208 };
209 };
210 };
211
212 mdio_pins: mdio_pins {
213 mux {
214 pins = "gpio0", "gpio1";
215 function = "gpio";
216 drive-strength = <8>;
217 bias-disable;
218 };
219 rst {
220 pins = "gpio26";
221 output-low;
222 };
223 };
224
225 sdmode_pins: sdmode_pinmux {
226 pins = "gpio25";
227 function = "gpio";
228 drive-strength = <16>;
229 bias-disable;
230 };
231
232 sdcc1_pins: sdcc1_pinmux {
233 mux {
234 pins = "gpio38", "gpio39", "gpio40",
235 "gpio41", "gpio42", "gpio43",
236 "gpio44", "gpio45", "gpio46",
237 "gpio47";
238 function = "sdc1";
239 };
240 cmd {
241 pins = "gpio45";
242 drive-strength = <10>;
243 bias-pull-up;
244 };
245 data {
246 pins = "gpio38", "gpio39", "gpio40",
247 "gpio41", "gpio43", "gpio44",
248 "gpio46", "gpio47";
249 drive-strength = <10>;
250 bias-pull-up;
251 };
252 clk {
253 pins = "gpio42";
254 drive-strength = <16>;
255 bias-pull-down;
256 };
257 };
258
259 i2c1_pins: i2c1_pinmux {
260 pins = "gpio53", "gpio54";
261 function = "gsbi1";
262 bias-disable;
263 };
264
265 rpm_i2c_pinmux: rpm_i2c_pinmux {
266 mux {
267 pins = "gpio12", "gpio13";
268 function = "gsbi4";
269 drive-strength = <12>;
270 bias-disable;
271 };
272 };
273
274 spi_pins: spi_pins {
275 mux {
276 pins = "gpio18", "gpio19", "gpio21";
277 function = "gsbi5";
278 bias-pull-down;
279 /delete-property/ bias-none;
280 /delete-property/ drive-strength;
281 };
282 data {
283 pins = "gpio18", "gpio19";
284 drive-strength = <10>;
285 };
286 cs {
287 pins = "gpio20";
288 drive-strength = <10>;
289 bias-pull-up;
290 };
291 clk {
292 pins = "gpio21";
293 drive-strength = <12>;
294 };
295 };
296
297 fw_pinmux {
298 wp {
299 pins = "gpio17";
300 output-low;
301 };
302 };
303
304 button_pins: button_pins {
305 recovery {
306 pins = "gpio16";
307 function = "gpio";
308 bias-none;
309 };
310 developer {
311 pins = "gpio15";
312 function = "gpio";
313 bias-none;
314 };
315 };
316
317 spi6_pins: spi6_pins {
318 mux {
319 pins = "gpio55", "gpio56", "gpio58";
320 function = "gsbi6";
321 bias-pull-down;
322 };
323 data {
324 pins = "gpio55", "gpio56";
325 drive-strength = <10>;
326 };
327 cs {
328 pins = "gpio57";
329 drive-strength = <10>;
330 bias-pull-up;
331 output-high;
332 };
333 clk {
334 pins = "gpio58";
335 drive-strength = <12>;
336 };
337 };
338 };
339
340 &adm_dma {
341 status = "okay";
342 };
343
344 &gmac0 {
345 status = "okay";
346 phy-mode = "rgmii";
347 qcom,id = <0>;
348
349 pinctrl-0 = <&rgmii0_pins>;
350 pinctrl-names = "default";
351
352 fixed-link {
353 speed = <1000>;
354 full-duplex;
355 };
356 };
357
358 &gmac2 {
359 status = "okay";
360 phy-mode = "sgmii";
361 qcom,id = <2>;
362
363 fixed-link {
364 speed = <1000>;
365 full-duplex;
366 };
367 };
368
369 &gsbi1 {
370 status = "okay";
371 qcom,mode = <GSBI_PROT_I2C_UART>;
372 };
373
374 &gsbi1_i2c {
375 status = "okay";
376
377 clock-frequency = <100000>;
378
379 pinctrl-0 = <&i2c1_pins>;
380 pinctrl-names = "default";
381
382 tpm@20 {
383 compatible = "infineon,slb9645tt";
384 reg = <0x20>;
385 powered-while-suspended;
386 };
387 };
388
389 &gsbi4 {
390 status = "okay";
391 qcom,mode = <GSBI_PROT_I2C_UART>;
392 };
393
394 &gsbi4_serial {
395 status = "okay";
396 };
397
398 &gsbi5 {
399 status = "okay";
400 qcom,mode = <GSBI_PROT_SPI>;
401
402 spi4: spi@1a280000 {
403 status = "okay";
404 spi-max-frequency = <50000000>;
405 pinctrl-0 = <&spi_pins>;
406 pinctrl-names = "default";
407
408 cs-gpios = <&qcom_pinmux 20 0>;
409
410 flash: flash@0 {
411 compatible = "jedec,spi-nor";
412 spi-max-frequency = <50000000>;
413 reg = <0>;
414 };
415 };
416 };
417
418 &gsbi6 {
419 status = "okay";
420 qcom,mode = <GSBI_PROT_SPI>;
421 };
422
423 &gsbi6_spi {
424 status = "okay";
425 spi-max-frequency = <25000000>;
426
427 pinctrl-0 = <&spi6_pins>;
428 pinctrl-names = "default";
429
430 cs-gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
431
432 dmas = <&adm_dma 8 0xb>,
433 <&adm_dma 7 0x14>;
434 dma-names = "rx", "tx";
435
436 /*
437 * This "spidev" was included in the manufacturer device tree. I suspect
438 * it's the (unused) Zigbee radio -- SiliconLabs EM3581 Zigbee? There's
439 * no driver or binding for this at the moment.
440 */
441 spidev@0 {
442 compatible = "spidev";
443 reg = <0>;
444 spi-max-frequency = <25000000>;
445 };
446 };
447
448 &pcie0 {
449 status = "okay";
450
451 pcie@0 {
452 reg = <0 0 0 0 0>;
453 #interrupt-cells = <1>;
454 #size-cells = <2>;
455 #address-cells = <3>;
456 device_type = "pci";
457 interrupt-controller;
458
459 ath10k@0,0 {
460 reg = <0 0 0 0 0>;
461 device_type = "pci";
462 qcom,ath10k-sa-gpio = <2 3 4 0>;
463 qcom,ath10k-sa-gpio-func = <5 5 5 0>;
464 };
465 };
466 };
467
468 &pcie1 {
469 status = "okay";
470
471 pcie@0 {
472 reg = <0 0 0 0 0>;
473 #interrupt-cells = <1>;
474 #size-cells = <2>;
475 #address-cells = <3>;
476 device_type = "pci";
477 interrupt-controller;
478
479 ath10k@0,0 {
480 reg = <0 0 0 0 0>;
481 device_type = "pci";
482 qcom,ath10k-sa-gpio = <2 3 4 0>;
483 qcom,ath10k-sa-gpio-func = <5 5 5 0>;
484 };
485 };
486 };
487
488 &pcie2 {
489 status = "okay";
490
491 pcie@0 {
492 reg = <0 0 0 0 0>;
493 #interrupt-cells = <1>;
494 #size-cells = <2>;
495 #address-cells = <3>;
496 device_type = "pci";
497 interrupt-controller;
498
499 ath10k@0,0 {
500 reg = <0 0 0 0 0>;
501 device_type = "pci";
502 };
503 };
504 };
505
506 &rpm {
507 pinctrl-0 = <&rpm_i2c_pinmux>;
508 pinctrl-names = "default";
509 };
510
511 &sdcc1 {
512 status = "okay";
513 pinctrl-0 = <&sdcc1_pins>;
514 pinctrl-names = "default";
515 /delete-property/ mmc-ddr-1_8v;
516 };
517
518 &tcsr {
519 compatible = "qcom,tcsr-ipq8064", "qcom,tcsr", "syscon";
520 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
521 };
522
523 &hs_phy_0 {
524 status = "okay";
525 };
526
527 &ss_phy_0 {
528 status = "okay";
529 };
530
531 &usb3_0 {
532 status = "okay";
533 };
534
535 &hs_phy_1 {
536 status = "okay";
537 };
538
539 &ss_phy_1 {
540 status = "okay";
541 };
542
543 &usb3_1 {
544 status = "okay";
545 };