63a72b53ae734b045df314951107eef8e99447bf
[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-g10.dts
1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-ipq8064-v2.0-smb208.dtsi"
3
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/soc/qcom,tcsr.h>
6
7 / {
8 compatible = "asrock,g10", "qcom,ipq8064";
9 model = "ASRock G10";
10
11 aliases {
12 ethernet0 = &gmac1;
13 ethernet1 = &gmac0;
14
15 led-boot = &led_status_blue;
16 led-failsafe = &led_status_amber;
17 led-running = &led_status_blue;
18 led-upgrade = &led_status_amber;
19 };
20
21 chosen {
22 bootargs-override = "console=ttyMSM0,115200n8";
23 };
24
25 leds {
26 compatible = "gpio-leds";
27
28 pinctrl-0 = <&led_pins>;
29 pinctrl-names = "default";
30
31 /*
32 * this is a bit misleading. Because there are about seven
33 * multicolor LEDs connected all wired together in parallel.
34 */
35
36 status_yellow {
37 label = "yellow:status";
38 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
39 };
40
41 led_status_amber: status_amber {
42 label = "amber:status";
43 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
44 };
45
46 led_status_blue: status_blue {
47 label = "blue:status";
48 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
49 };
50
51 /*
52 * LED is declared in vendors boardfile but it's not
53 * working and the manual doesn't mention anything
54 * about the LED being white.
55
56 status_white {
57 label = "white:status";
58 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
59 };
60 */
61 };
62
63 i2c-gpio {
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 compatible = "i2c-gpio";
68 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>, /* sda */
69 <&qcom_pinmux 54 GPIO_ACTIVE_HIGH>; /* scl */
70 i2c-gpio,delay-us = <5>;
71 i2c-gpio,scl-output-only;
72
73 mcu@50 {
74 reg = <0x50>;
75 compatible = "sonix,sn8f25e21";
76 };
77 };
78
79 keys {
80 compatible = "gpio-keys";
81
82 pinctrl-0 = <&button_pins>;
83 pinctrl-names = "default";
84
85 ir-remote {
86 label = "ir-remote";
87 gpios = <&qcom_pinmux 15 GPIO_ACTIVE_LOW>;
88 linux,code = <BTN_0>;
89 debounce-interval = <60>;
90 wakeup-source;
91 };
92
93 reset {
94 label = "reset";
95 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
96 linux,code = <KEY_RESTART>;
97 debounce-interval = <60>;
98 wakeup-source;
99 };
100
101 wps5g {
102 label = "wps5g";
103 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
104 linux,code = <KEY_WPS_BUTTON>;
105 debounce-interval = <60>;
106 wakeup-source;
107 };
108
109 wps2g {
110 label = "wps2g";
111 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
112 linux,code = <KEY_WPS_BUTTON>;
113 debounce-interval = <60>;
114 wakeup-source;
115 };
116 };
117 };
118
119 &adm_dma {
120 status = "okay";
121 };
122
123 &gmac1 {
124 status = "okay";
125
126 pinctrl-0 = <&rgmii2_pins>;
127 pinctrl-names = "default";
128
129 phy-mode = "rgmii";
130 qcom,id = <1>;
131
132 fixed-link {
133 speed = <1000>;
134 full-duplex;
135 };
136 };
137
138 &gmac2 {
139 status = "okay";
140
141 phy-mode = "sgmii";
142 qcom,id = <2>;
143
144 fixed-link {
145 speed = <1000>;
146 full-duplex;
147 };
148 };
149
150 &gsbi4_serial {
151 pinctrl-0 = <&uart0_pins>;
152 pinctrl-names = "default";
153 };
154
155 &mdio0 {
156 status = "okay";
157
158 pinctrl-0 = <&mdio0_pins>;
159 pinctrl-names = "default";
160
161 ethernet-phy@0 {
162 reg = <0>;
163 qca,ar8327-initvals = <
164 0x00004 0x7600000 /* PAD0_MODE */
165 0x00008 0x1000000 /* PAD5_MODE */
166 0x0000c 0x80 /* PAD6_MODE */
167 0x000e4 0x6a545 /* MAC_POWER_SEL */
168 0x000e0 0xc74164de /* SGMII_CTRL */
169 0x0007c 0x4e /* PORT0_STATUS */
170 0x00094 0x4e /* PORT6_STATUS */
171 >;
172 };
173 };
174
175 &nand {
176 status = "okay";
177
178 nand@0 {
179 reg = <0>;
180 compatible = "qcom,nandcs";
181
182 nand-ecc-strength = <4>;
183 nand-bus-width = <8>;
184 nand-ecc-step-size = <512>;
185
186 nand-is-boot-medium;
187 qcom,boot-partitions = <0x0 0x1200000>;
188
189 partitions {
190 compatible = "qcom,smem-part";
191 };
192 };
193 };
194
195 &pcie0 {
196 status = "okay";
197
198 bridge@0,0 {
199 reg = <0x00000000 0 0 0 0>;
200 #address-cells = <3>;
201 #size-cells = <2>;
202 ranges;
203
204 wifi5g: wifi@1,0 {
205 reg = <0x00010000 0 0 0 0>;
206 compatible = "qcom,ath10k";
207 qcom,ath10k-calibration-variant = "ASRock-G10";
208 };
209 };
210 };
211
212 &pcie1 {
213 status = "okay";
214
215 bridge@0,0 {
216 reg = <0x00000000 0 0 0 0>;
217 #address-cells = <3>;
218 #size-cells = <2>;
219 ranges;
220
221 wifi2g: wifi@1,0 {
222 reg = <0x00010000 0 0 0 0>;
223 compatible = "qcom,ath10k";
224 qcom,ath10k-calibration-variant = "ASRock-G10";
225 };
226 };
227 };
228
229 &qcom_pinmux {
230 led_pins: led_pins {
231 mux {
232 pins = "gpio7", "gpio8", "gpio9", "gpio26";
233 function = "gpio";
234 drive-strength = <2>;
235 bias-pull-up;
236 };
237 };
238
239 button_pins: button_pins {
240 mux {
241 pins = "gpio15", "gpio16", "gpio64", "gpio65";
242 function = "gpio";
243 drive-strength = <2>;
244 bias-pull-up;
245 };
246 };
247
248 uart0_pins: uart0_pins {
249 mux {
250 pins = "gpio10", "gpio11";
251 function = "gsbi4";
252 drive-strength = <10>;
253 bias-disable;
254 };
255 };
256 };
257
258 &rpm {
259 pinctrl-0 = <&i2c4_pins>;
260 pinctrl-names = "default";
261 };
262
263 &hs_phy_0 {
264 status = "okay";
265 };
266
267 &ss_phy_0 {
268 status = "okay";
269 };
270
271 &usb3_0 {
272 status = "okay";
273 };
274
275 &hs_phy_1 {
276 status = "okay";
277 };
278
279 &ss_phy_1 {
280 status = "okay";
281 };
282
283 &usb3_1 {
284 status = "okay";
285 };
286
287 &tcsr {
288 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
289 };
290
291 /delete-node/ &pcie2_pins;
292 /delete-node/ &pcie2;