target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-fap-421e.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qcom-ipq8064-smb208.dtsi"
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         model = "Fortinet FAP-421E";
   8         compatible = "fortinet,fap-421e", "qcom,ipq8064";
   9
  10         memory@0 {
  11                 device_type = "memory";
  12                 reg = <0x42000000 0xe000000>;
  13         };
  14
  15         reserved-memory {
  16                 rsvd@41200000 {
  17                         no-map;
  18                         reg = <0x41200000 0x300000>;
  19                 };
  20                 wifi_dump@44000000 {
  21                         no-map;
  22                         reg = <0x44000000 0x600000>;
  23                 };
  24         };
  25
  26         aliases {
  27                 led-boot = &led_power_yellow;
  28                 led-failsafe = &led_power_yellow;
  29                 led-running = &led_power_yellow;
  30                 led-upgrade = &led_power_yellow;
  31                 label-mac-device = &gmac0;
  32         };
  33
  34         chosen {
  35                 bootargs-override = "console=ttyMSM0,9600n8";
  36         };
  37
  38         keys {
  39                 compatible = "gpio-keys";
  40                 pinctrl-0 = <&button_pins>;
  41                 pinctrl-names = "default";
  42
  43                 reset {
  44                         label = "reset";
  45                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
  46                         linux,code = <KEY_RESTART>;
  47                 };
  48         };
  49
  50         leds {
  51                 compatible = "gpio-leds";
  52                 pinctrl-0 = <&led_pins>;
  53                 pinctrl-names = "default";
  54
  55                 eth1_amber {
  56                         label = "amber:eth1";
  57                         gpios = <&qcom_pinmux 27 GPIO_ACTIVE_LOW>;
  58                 };
  59
  60                 eth1_yellow {
  61                         label = "yellow:eth1";
  62                         gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
  63                 };
  64
  65                 eth2_amber {
  66                         label = "amber:eth2";
  67                         gpios = <&qcom_pinmux 29 GPIO_ACTIVE_LOW>;
  68                 };
  69
  70                 eth2_yellow {
  71                         label = "yellow:eth2";
  72                         gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
  73                 };
  74
  75                 power_amber {
  76                         label = "amber:power";
  77                         gpios = <&qcom_pinmux 53 GPIO_ACTIVE_LOW>;
  78                 };
  79
  80                 led_power_yellow: power_yellow {
  81                         label = "yellow:power";
  82                         gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
  83                 };
  84
  85                 2g_yellow {
  86                         label = "yellow:2g";
  87                         gpios = <&qcom_pinmux 30 GPIO_ACTIVE_LOW>;
  88                 };
  89
  90                 5g_yellow {
  91                         label = "yellow:5g";
  92                         gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
  93                 };
  94         };
  95 };
  96
  97 &qcom_pinmux {
  98         button_pins: button_pins {
  99                 mux {
 100                         bias-pull-up;
 101                         drive-strength = <2>;
 102                         pins = "gpio56";
 103                 };
 104         };
 105
 106         led_pins: led_pins {
 107                 mux {
 108                         bias-pull-down;
 109                         drive-strength = <2>;
 110                         function = "gpio";
 111                         output-low;
 112                         pins = "gpio23";
 113                 };
 114         };
 115
 116         rgmii2_pins: rgmii2-pins {
 117                 mux {
 118                         bias-disable;
 119                         drive-strength = <16>;
 120                         function = "rgmii2";
 121                         pins = "gpio66";
 122                 };
 123         };
 124
 125         spi_pins: spi_pins {
 126                 mux {
 127                         pins = "gpio18", "gpio19", "gpio21";
 128                         function = "gsbi5";
 129                         bias-pull-down;
 130                 };
 131
 132                 data {
 133                         pins = "gpio18", "gpio19";
 134                         drive-strength = <10>;
 135                 };
 136
 137                 cs {
 138                         pins = "gpio20";
 139                         drive-strength = <10>;
 140                         bias-pull-up;
 141                 };
 142
 143                 clk {
 144                         pins = "gpio21";
 145                         drive-strength = <12>;
 146                 };
 147         };
 148
 149         uart0_pins: uart0_pins {
 150                 mux {
 151                         bias-disable;
 152                         drive-strength = <12>;
 153                         function = "gsbi7";
 154                         pins = "gpio6", "gpio7";
 155                 };
 156         };
 157
 158         usb_pwr_en_pins: usb_pwr_en_pins {
 159                 mux {
 160                         pins = "gpio22";
 161                         function = "gpio";
 162                         drive-strength = <12>;
 163                         bias-pull-down;
 164                         output-low;
 165                 };
 166         };
 167 };
 168
 169 &gsbi7 {
 170         status = "okay";
 171
 172         qcom,mode = <GSBI_PROT_I2C_UART>;
 173 };
 174
 175 &gsbi7_serial{
 176         status = "okay";
 177
 178         pinctrl-0 = <&uart0_pins>;
 179         pinctrl-names = "default";
 180 };
 181
 182 &gsbi5 {
 183         status = "okay";
 184
 185         qcom,mode = <GSBI_PROT_SPI>;
 186
 187         spi@1a280000 {
 188                 status = "okay";
 189
 190                 pinctrl-0 = <&spi_pins>;
 191                 pinctrl-names = "default";
 192                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 193
 194                 flash@0 {
 195                         compatible = "jedec,spi-nor";
 196                         #address-cells = <1>;
 197                         #size-cells = <1>;
 198                         spi-max-frequency = <50000000>;
 199                         reg = <0>;
 200                         m25p,fast-read;
 201
 202                         partition@0 {
 203                                 label = "SBL1";
 204                                 reg = <0x0 0x20000>;
 205                                 read-only;
 206                         };
 207
 208                         partition@20000 {
 209                                 label = "MIBIB";
 210                                 reg = <0x20000 0x20000>;
 211                                 read-only;
 212                         };
 213
 214                         partition@40000 {
 215                                 label = "SBL2";
 216                                 reg = <0x40000 0x40000>;
 217                                 read-only;
 218                         };
 219
 220                         partition@80000 {
 221                                 label = "SBL3";
 222                                 reg = <0x80000 0x80000>;
 223                                 read-only;
 224                         };
 225
 226                         partition@100000 {
 227                                 label = "DDRCONFIG";
 228                                 reg = <0x100000 0x10000>;
 229                                 read-only;
 230                         };
 231
 232                         partition@110000 {
 233                                 label = "SSD";
 234                                 reg = <0x110000 0x10000>;
 235                                 read-only;
 236                         };
 237
 238                         partition@120000 {
 239                                 label = "TZ";
 240                                 reg = <0x120000 0x80000>;
 241                                 read-only;
 242                         };
 243
 244                         partition@1a0000 {
 245                                 label = "RPM";
 246                                 reg = <0x1a0000 0x80000>;
 247                                 read-only;
 248                         };
 249
 250                         partition@220000 {
 251                                 label = "APPSBL";
 252                                 reg = <0x220000 0x80000>;
 253                                 read-only;
 254
 255                                 nvmem-layout {
 256                                         compatible = "fixed-layout";
 257                                         #address-cells = <1>;
 258                                         #size-cells = <1>;
 259
 260                                         macaddr_appsbl_7ff80: mac-address@7ff80 {
 261                                                 compatible = "mac-base";
 262                                                 reg = <0x7ff80 0xc>;
 263                                                 #nvmem-cell-cells = <1>;
 264                                         };
 265                                 };
 266                         };
 267
 268                         partition@2a0000 {
 269                                 label = "APPSBLENV";
 270                                 reg = <0x2a0000 0x40000>;
 271                         };
 272
 273                         partition@2e0000 {
 274                                 label = "ART";
 275                                 reg = <0x2e0000 0x40000>;
 276                                 read-only;
 277                         };
 278
 279                         partition@320000 {
 280                                 label = "kernel";
 281                                 reg = <0x320000 0x600000>;
 282                         };
 283
 284                         partition@920000 {
 285                                 label = "ubi";
 286                                 reg = <0x920000 0x1400000>;
 287                         };
 288
 289                         partition@1d20000 {
 290                                 label = "reserved";
 291                                 reg = <0x1d20000 0x260000>;
 292                                 read-only;
 293                         };
 294
 295                         partition@1f80000 {
 296                                 label = "config";
 297                                 reg = <0x1f80000 0x80000>;
 298                                 read-only;
 299                         };
 300                 };
 301         };
 302 };
 303
 304 &hs_phy_1 {
 305         status = "okay";
 306 };
 307
 308 &ss_phy_1 {
 309         status = "okay";
 310 };
 311
 312 &usb3_1 {
 313         status = "okay";
 314
 315         pinctrl-0 = <&usb_pwr_en_pins>;
 316         pinctrl-names = "default";
 317 };
 318
 319 &pcie0 {
 320         status = "okay";
 321
 322         bridge@0,0 {
 323                 reg = <0x00000000 0 0 0 0>;
 324                 #address-cells = <3>;
 325                 #size-cells = <2>;
 326                 ranges;
 327
 328                 wifi@1,0 {
 329                         compatible = "pci168c,0040";
 330                         reg = <0x00010000 0 0 0 0>;
 331
 332                         nvmem-cells = <&macaddr_appsbl_7ff80 8>;
 333                         nvmem-cell-names = "mac-address";
 334                 };
 335         };
 336 };
 337
 338 &pcie1 {
 339         status = "okay";
 340
 341         max-link-speed = <1>;
 342
 343         bridge@0,0 {
 344                 reg = <0x00000000 0 0 0 0>;
 345                 #address-cells = <3>;
 346                 #size-cells = <2>;
 347                 ranges;
 348
 349                 wifi@1,0 {
 350                         compatible = "pci168c,0040";
 351                         reg = <0x00010000 0 0 0 0>;
 352
 353                         nvmem-cells = <&macaddr_appsbl_7ff80 16>;
 354                         nvmem-cell-names = "mac-address";
 355                 };
 356         };
 357 };
 358
 359 &adm_dma {
 360         status = "okay";
 361 };
 362
 363 &mdio0 {
 364         status = "okay";
 365
 366         #address-cells = <0x1>;
 367         #size-cells = <0x0>;
 368         gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH>,
 369                         <&qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
 370         pinctrl-0 = <&mdio0_pins>;
 371         pinctrl-names = "default";
 372
 373         phy1: ethernet-phy@1 {
 374                 reg = <1>;
 375         };
 376
 377         phy2: ethernet-phy@2 {
 378                 reg = <2>;
 379         };
 380 };
 381
 382 &gmac0 {
 383         status = "okay";
 384
 385         phy-mode = "rgmii";
 386         qcom,id = <0>;
 387         pinctrl-0 = <&rgmii2_pins>;
 388         pinctrl-names = "default";
 389         nvmem-cells = <&macaddr_appsbl_7ff80 0>;
 390         nvmem-cell-names = "mac-address";
 391
 392         fixed-link {
 393                 speed = <1000>;
 394                 full-duplex;
 395         };
 396 };
 397
 398 &gmac2 {
 399         status = "okay";
 400
 401         phy-mode = "sgmii";
 402         qcom,id = <2>;
 403         nvmem-cells = <&macaddr_appsbl_7ff80 1>;
 404         nvmem-cell-names = "mac-address";
 405
 406         fixed-link {
 407                 speed = <1000>;
 408                 full-duplex;
 409         };
 410 };