c8e4a1810eb9f5c2dd33c8e8ba5ff0e135d0dfff
[openwrt/openwrt.git] / target / linux / ipq806x / files / arch / arm / boot / dts / qcom-ipq8064-d7800.dts
1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
2
3 #include <dt-bindings/input/input.h>
4
5 / {
6 model = "Netgear Nighthawk X4 D7800";
7 compatible = "netgear,d7800", "qcom,ipq8064";
8
9 memory@0 {
10 reg = <0x42000000 0x1e000000>;
11 device_type = "memory";
12 };
13
14 reserved-memory {
15 rsvd@5fe00000 {
16 reg = <0x5fe00000 0x200000>;
17 reusable;
18 };
19 };
20
21 aliases {
22 mdio-gpio0 = &mdio0;
23
24 led-boot = &power_white;
25 led-failsafe = &power_amber;
26 led-running = &power_white;
27 led-upgrade = &power_amber;
28 };
29
30 chosen {
31 bootargs = "rootfstype=squashfs noinitrd";
32 };
33
34 keys {
35 compatible = "gpio-keys";
36 pinctrl-0 = <&button_pins>;
37 pinctrl-names = "default";
38
39 wifi {
40 label = "wifi";
41 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
42 linux,code = <KEY_RFKILL>;
43 debounce-interval = <60>;
44 wakeup-source;
45 };
46
47 reset {
48 label = "reset";
49 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
50 linux,code = <KEY_RESTART>;
51 debounce-interval = <60>;
52 wakeup-source;
53 };
54
55 wps {
56 label = "wps";
57 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
58 linux,code = <KEY_WPS_BUTTON>;
59 debounce-interval = <60>;
60 wakeup-source;
61 };
62 };
63
64 leds {
65 compatible = "gpio-leds";
66 pinctrl-0 = <&led_pins>;
67 pinctrl-names = "default";
68
69 usb1 {
70 label = "white:usb1";
71 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
72 };
73
74 usb2 {
75 label = "white:usb2";
76 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
77 };
78
79 power_amber: power_amber {
80 label = "amber:power";
81 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
82 };
83
84 wan_white {
85 label = "white:wan";
86 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
87 };
88
89 wan_amber {
90 label = "amber:wan";
91 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
92 };
93
94 wps {
95 label = "white:wps";
96 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
97 };
98
99 esata {
100 label = "white:esata";
101 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
102 };
103
104 power_white: power_white {
105 label = "white:power";
106 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
107 default-state = "keep";
108 };
109
110 wifi {
111 label = "white:wifi";
112 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
113 };
114 };
115 };
116
117 &qcom_pinmux {
118 button_pins: button_pins {
119 mux {
120 pins = "gpio6", "gpio54", "gpio65";
121 function = "gpio";
122 drive-strength = <2>;
123 bias-pull-up;
124 };
125 };
126
127 led_pins: led_pins {
128 mux {
129 pins = "gpio7", "gpio8", "gpio9", "gpio22", "gpio23",
130 "gpio24","gpio26", "gpio53", "gpio64";
131 function = "gpio";
132 drive-strength = <2>;
133 bias-pull-up;
134 };
135 };
136
137 usb0_pwr_en_pins: usb0_pwr_en_pins {
138 mux {
139 pins = "gpio15";
140 function = "gpio";
141 drive-strength = <12>;
142 bias-pull-down;
143 output-high;
144 };
145 };
146
147 usb1_pwr_en_pins: usb1_pwr_en_pins {
148 mux {
149 pins = "gpio16", "gpio68";
150 function = "gpio";
151 drive-strength = <12>;
152 bias-pull-down;
153 output-high;
154 };
155 };
156 };
157
158 &sata_phy {
159 status = "okay";
160 };
161
162 &sata {
163 status = "okay";
164 };
165
166 &hs_phy_0 {
167 status = "okay";
168 };
169
170 &ss_phy_0 {
171 status = "okay";
172 };
173
174 &usb3_0 {
175 status = "okay";
176
177 pinctrl-0 = <&usb0_pwr_en_pins>;
178 pinctrl-names = "default";
179 };
180
181 &hs_phy_1 {
182 status = "okay";
183 };
184
185 &ss_phy_1 {
186 status = "okay";
187 };
188
189 &usb3_1 {
190 status = "okay";
191
192 pinctrl-0 = <&usb1_pwr_en_pins>;
193 pinctrl-names = "default";
194 };
195
196 &pcie0 {
197 status = "okay";
198 reset-gpio = <&qcom_pinmux 3 GPIO_ACTIVE_HIGH>;
199 pinctrl-0 = <&pcie0_pins>;
200 pinctrl-names = "default";
201
202 bridge@0,0 {
203 reg = <0x00000000 0 0 0 0>;
204 #address-cells = <3>;
205 #size-cells = <2>;
206 ranges;
207
208 wifi@1,0 {
209 compatible = "pci168c,0040";
210 reg = <0x00010000 0 0 0 0>;
211
212 nvmem-cells = <&macaddr_art_6>, <&precal_art_1000>;
213 nvmem-cell-names = "mac-address", "pre-calibration";
214 mac-address-increment = <(1)>;
215 };
216 };
217 };
218
219 &pcie1 {
220 status = "okay";
221 reset-gpio = <&qcom_pinmux 48 GPIO_ACTIVE_HIGH>;
222 pinctrl-0 = <&pcie1_pins>;
223 pinctrl-names = "default";
224 max-link-speed = <1>;
225
226 bridge@0,0 {
227 reg = <0x00000000 0 0 0 0>;
228 #address-cells = <3>;
229 #size-cells = <2>;
230 ranges;
231
232 wifi@1,0 {
233 compatible = "pci168c,0040";
234 reg = <0x00010000 0 0 0 0>;
235
236 nvmem-cells = <&macaddr_art_6>, <&precal_art_5000>;
237 nvmem-cell-names = "mac-address", "pre-calibration";
238 mac-address-increment = <(2)>;
239 };
240 };
241 };
242
243 &pcie2 {
244 status = "okay";
245 reset-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>;
246 pinctrl-0 = <&pcie2_pins>;
247 pinctrl-names = "default";
248 };
249
250 &nand {
251 status = "okay";
252
253 nand@0 {
254 reg = <0>;
255 compatible = "qcom,nandcs";
256
257 nand-ecc-strength = <4>;
258 nand-bus-width = <8>;
259 nand-ecc-step-size = <512>;
260
261 nand-is-boot-medium;
262 qcom,boot-partitions = <0x0 0x1180000>;
263
264 partitions {
265 compatible = "fixed-partitions";
266 #address-cells = <1>;
267 #size-cells = <1>;
268
269 qcadata@0 {
270 label = "qcadata";
271 reg = <0x0000000 0x0c80000>;
272 read-only;
273 };
274
275 APPSBL@c80000 {
276 label = "APPSBL";
277 reg = <0x0c80000 0x0500000>;
278 read-only;
279 };
280
281 APPSBLENV@1180000 {
282 label = "APPSBLENV";
283 reg = <0x1180000 0x0080000>;
284 read-only;
285 };
286
287 art@1200000 {
288 label = "art";
289 reg = <0x1200000 0x0140000>;
290 read-only;
291 compatible = "nvmem-cells";
292 #address-cells = <1>;
293 #size-cells = <1>;
294
295 macaddr_art_0: macaddr@0 {
296 reg = <0x0 0x6>;
297 };
298
299 macaddr_art_6: macaddr@6 {
300 reg = <0x6 0x6>;
301 };
302
303 precal_art_1000: precal@1000 {
304 reg = <0x1000 0x2f20>;
305 };
306
307 precal_art_5000: precal@5000 {
308 reg = <0x5000 0x2f20>;
309 };
310 };
311
312 artbak: art@1340000 {
313 label = "artbak";
314 reg = <0x1340000 0x0140000>;
315 read-only;
316 };
317
318 kernel@1480000 {
319 label = "kernel";
320 reg = <0x1480000 0x0400000>;
321 };
322
323 ubi@1880000 {
324 label = "ubi";
325 reg = <0x1880000 0x6080000>;
326 };
327
328 reserve@7900000 {
329 label = "reserve";
330 reg = <0x7900000 0x0700000>;
331 read-only;
332 };
333 };
334 };
335 };
336
337 &mdio0 {
338 status = "okay";
339
340 pinctrl-0 = <&mdio0_pins>;
341 pinctrl-names = "default";
342
343 switch@10 {
344 compatible = "qca,qca8337";
345 #address-cells = <1>;
346 #size-cells = <0>;
347 reg = <0x10>;
348
349 ports {
350 #address-cells = <1>;
351 #size-cells = <0>;
352
353 port@0 {
354 reg = <0>;
355 label = "cpu";
356 ethernet = <&gmac1>;
357 phy-mode = "rgmii";
358 tx-internal-delay-ps = <1000>;
359 rx-internal-delay-ps = <1000>;
360
361 fixed-link {
362 speed = <1000>;
363 full-duplex;
364 };
365 };
366
367 port@1 {
368 reg = <1>;
369 label = "lan1";
370 phy-mode = "internal";
371 phy-handle = <&phy_port1>;
372 };
373
374 port@2 {
375 reg = <2>;
376 label = "lan2";
377 phy-mode = "internal";
378 phy-handle = <&phy_port2>;
379 };
380
381 port@3 {
382 reg = <3>;
383 label = "lan3";
384 phy-mode = "internal";
385 phy-handle = <&phy_port3>;
386 };
387
388 port@4 {
389 reg = <4>;
390 label = "lan4";
391 phy-mode = "internal";
392 phy-handle = <&phy_port4>;
393 };
394
395 port@5 {
396 reg = <5>;
397 label = "wan";
398 phy-mode = "internal";
399 phy-handle = <&phy_port5>;
400 };
401
402 /*
403 port@6 {
404 reg = <0>;
405 label = "cpu";
406 ethernet = <&gmac2>;
407 phy-mode = "rgmii";
408
409 fixed-link {
410 speed = <1000>;
411 full-duplex;
412 pause;
413 asym-pause;
414 };
415 };
416 */
417 };
418
419 mdio {
420 #address-cells = <1>;
421 #size-cells = <0>;
422
423 phy_port1: phy@0 {
424 reg = <0>;
425 };
426
427 phy_port2: phy@1 {
428 reg = <1>;
429 };
430
431 phy_port3: phy@2 {
432 reg = <2>;
433 };
434
435 phy_port4: phy@3 {
436 reg = <3>;
437 };
438
439 phy_port5: phy@4 {
440 reg = <4>;
441 };
442 };
443 };
444 };
445
446 &gmac1 {
447 status = "okay";
448 phy-mode = "rgmii";
449 qcom,id = <1>;
450
451 pinctrl-0 = <&rgmii2_pins>;
452 pinctrl-names = "default";
453
454 nvmem-cells = <&macaddr_art_6>;
455 nvmem-cell-names = "mac-address";
456
457 fixed-link {
458 speed = <1000>;
459 full-duplex;
460 };
461 };
462
463 &gmac2 {
464 status = "okay";
465 phy-mode = "sgmii";
466 qcom,id = <2>;
467
468 nvmem-cells = <&macaddr_art_0>;
469 nvmem-cell-names = "mac-address";
470
471 fixed-link {
472 speed = <1000>;
473 full-duplex;
474 };
475 };
476
477 &adm_dma {
478 status = "okay";
479 };