ipq806x: split files in 6.1 and 6.6 dedicated directory
[openwrt/openwrt.git] / target / linux / ipq806x / files-6.6 / arch / arm / boot / dts / qcom / qcom-ipq8068-ecw5410.dts
1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
2
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/soc/qcom,tcsr.h>
6
7 / {
8 model = "Edgecore ECW5410";
9 compatible = "edgecore,ecw5410", "qcom,ipq8064";
10
11 reserved-memory {
12 nss@40000000 {
13 reg = <0x40000000 0x1000000>;
14 no-map;
15 };
16
17 smem: smem@41000000 {
18 reg = <0x41000000 0x200000>;
19 no-map;
20 };
21
22 wifi_dump@44000000 {
23 reg = <0x44000000 0x600000>;
24 no-map;
25 };
26 };
27
28 cpus {
29 idle-states {
30 CPU_SPC: spc {
31 status = "disabled";
32 };
33 };
34 };
35
36 aliases {
37 serial1 = &gsbi1_serial;
38 ethernet0 = &gmac2;
39 ethernet1 = &gmac3;
40
41 led-boot = &led_power_green;
42 led-failsafe = &led_power_red;
43 led-running = &led_power_green;
44 led-upgrade = &led_power_green;
45 };
46
47 chosen {
48 bootargs-append = " console=ttyMSM0,115200n8 root=/dev/ubiblock0_1";
49 };
50
51 keys {
52 compatible = "gpio-keys";
53 pinctrl-0 = <&button_pins>;
54 pinctrl-names = "default";
55
56 reset {
57 label = "reset";
58 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
59 linux,code = <KEY_RESTART>;
60 debounce-interval = <60>;
61 wakeup-source;
62 };
63 };
64
65 leds {
66 compatible = "gpio-leds";
67 pinctrl-0 = <&led_pins>;
68 pinctrl-names = "default";
69
70 led_power_green: power_green {
71 function = LED_FUNCTION_POWER;
72 color = <LED_COLOR_ID_GREEN>;
73 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
74 };
75
76 wlan2g_green {
77 label = "green:wlan2g";
78 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_LOW>;
79 };
80
81 wlan2g_yellow {
82 label = "yellow:wlan2g";
83 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
84 };
85
86 wlan5g_green {
87 label = "green:wlan5g";
88 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
89 };
90
91 led_power_red: power_red {
92 function = LED_FUNCTION_POWER;
93 color = <LED_COLOR_ID_RED>;
94 gpios = <&qcom_pinmux 28 GPIO_ACTIVE_LOW>;
95 };
96
97 wlan5g_yellow {
98 label = "yellow:wlan5g";
99 gpios = <&qcom_pinmux 59 GPIO_ACTIVE_LOW>;
100 };
101 };
102 };
103
104
105 &qcom_pinmux {
106 spi_pins: spi_pins {
107 mux {
108 pins = "gpio18", "gpio19";
109 function = "gsbi5";
110 drive-strength = <10>;
111 bias-pull-down;
112 };
113
114 clk {
115 pins = "gpio21";
116 function = "gsbi5";
117 drive-strength = <12>;
118 bias-pull-down;
119 };
120
121 cs {
122 pins = "gpio20";
123 function = "gpio";
124 drive-strength = <10>;
125 bias-pull-up;
126 };
127 };
128
129 led_pins: led_pins {
130 mux {
131 pins = "gpio16", "gpio23", "gpio24", "gpio26",
132 "gpio28", "gpio59";
133 function = "gpio";
134 drive-strength = <2>;
135 bias-pull-up;
136 };
137 };
138
139 button_pins: button_pins {
140 mux {
141 pins = "gpio25";
142 function = "gpio";
143 drive-strength = <2>;
144 bias-pull-up;
145 };
146 };
147
148 uart1_pins: uart1_pins {
149 mux {
150 pins = "gpio51", "gpio52", "gpio53", "gpio54";
151 function = "gsbi1";
152 drive-strength = <12>;
153 bias-none;
154 };
155 };
156 };
157
158 &gsbi1 {
159 qcom,mode = <GSBI_PROT_UART_W_FC>;
160 status = "okay";
161
162 serial@12450000 {
163 status = "okay";
164
165 pinctrl-0 = <&uart1_pins>;
166 pinctrl-names = "default";
167 };
168 };
169
170 &gsbi5 {
171 qcom,mode = <GSBI_PROT_SPI>;
172 status = "okay";
173
174 spi4: spi@1a280000 {
175 status = "okay";
176 spi-max-frequency = <50000000>;
177
178 pinctrl-0 = <&spi_pins>;
179 pinctrl-names = "default";
180
181 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
182
183 m25p80@0 {
184 compatible = "jedec,spi-nor";
185 #address-cells = <1>;
186 #size-cells = <1>;
187 spi-max-frequency = <50000000>;
188 reg = <0>;
189
190 partitions {
191 compatible = "qcom,smem-part";
192 };
193 };
194 };
195 };
196
197 &hs_phy_0 {
198 status = "okay";
199 };
200
201 &ss_phy_0 {
202 status = "okay";
203 };
204
205 &usb3_0 {
206 status = "okay";
207 };
208
209 &hs_phy_1 {
210 status = "okay";
211 };
212
213 &ss_phy_1 {
214 status = "okay";
215 };
216
217 &usb3_1 {
218 status = "okay";
219 };
220
221 &pcie1 {
222 status = "okay";
223
224 /delete-property/ pinctrl-0;
225 /delete-property/ pinctrl-names;
226 /delete-property/ perst-gpios;
227
228 bridge@0,0 {
229 reg = <0x00000000 0 0 0 0>;
230 #address-cells = <3>;
231 #size-cells = <2>;
232 ranges;
233
234 wifi@1,0 {
235 compatible = "qcom,ath10k";
236 status = "okay";
237 reg = <0x00010000 0 0 0 0>;
238 qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
239 };
240 };
241 };
242
243 &pcie2 {
244 status = "okay";
245
246 /delete-property/ pinctrl-0;
247 /delete-property/ pinctrl-names;
248 /delete-property/ perst-gpios;
249
250 bridge@0,0 {
251 reg = <0x00000000 0 0 0 0>;
252 #address-cells = <3>;
253 #size-cells = <2>;
254 ranges;
255
256 wifi@1,0 {
257 compatible = "qcom,ath10k";
258 status = "okay";
259 reg = <0x00010000 0 0 0 0>;
260 qcom,ath10k-calibration-variant = "Edgecore-ECW5410-L";
261 };
262 };
263 };
264
265 &nand {
266 status = "okay";
267
268 nand@0 {
269 compatible = "qcom,nandcs";
270
271 reg = <0>;
272
273 nand-ecc-strength = <4>;
274 nand-bus-width = <8>;
275 nand-ecc-step-size = <512>;
276
277 partitions {
278 compatible = "fixed-partitions";
279 #address-cells = <1>;
280 #size-cells = <1>;
281
282 rootfs1@0 {
283 label = "rootfs1";
284 reg = <0x0000000 0x4000000>;
285 };
286
287 rootfs2@4000000 {
288 label = "rootfs2";
289 reg = <0x4000000 0x4000000>;
290 };
291 };
292 };
293 };
294
295 &mdio0 {
296 status = "okay";
297
298 pinctrl-0 = <&mdio0_pins>;
299 pinctrl-names = "default";
300
301 phy0: ethernet-phy@0 {
302 reg = <0>;
303 };
304
305 phy1: ethernet-phy@1 {
306 reg = <1>;
307 };
308 };
309
310 &gmac2 {
311 status = "okay";
312
313 qcom,id = <2>;
314 mdiobus = <&mdio0>;
315
316 phy-mode = "sgmii";
317 phy-handle = <&phy1>;
318 };
319
320 &gmac3 {
321 status = "okay";
322
323 qcom,id = <3>;
324 mdiobus = <&mdio0>;
325
326 phy-mode = "sgmii";
327 phy-handle = <&phy0>;
328 };
329
330 &adm_dma {
331 status = "okay";
332 };