target/linux/ipq806x/files-6.1/arch/arm/boot/dts/qcom-ipq8064-wg2600hp.dts

   1 #include "qcom-ipq8064-v2.0-smb208.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         model = "NEC Aterm WG2600HP";
   7         compatible = "nec,wg2600hp", "qcom,ipq8064";
   8
   9         memory@0 {
  10                 reg = <0x42000000 0x1e000000>;
  11                 device_type = "memory";
  12         };
  13
  14         aliases {
  15                 mdio-gpio0 = &mdio0;
  16
  17                 led-boot = &power_green;
  18                 led-failsafe = &power_red;
  19                 led-running = &power_green;
  20                 led-upgrade = &power_green;
  21         };
  22
  23         keys {
  24                 compatible = "gpio-keys";
  25                 pinctrl-0 = <&button_pins>;
  26                 pinctrl-names = "default";
  27
  28                 wps {
  29                         label = "wps";
  30                         gpios = <&qcom_pinmux 16 GPIO_ACTIVE_LOW>;
  31                         linux,code = <KEY_WPS_BUTTON>;
  32                         debounce-interval = <60>;
  33                         wakeup-source;
  34                 };
  35
  36                 reset {
  37                         label = "reset";
  38                         gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
  39                         linux,code = <KEY_RESTART>;
  40                         debounce-interval = <60>;
  41                         wakeup-source;
  42                 };
  43
  44                 bridge {
  45                         label = "bridge";
  46                         gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
  47                         linux,code = <BTN_0>;
  48                         linux,input-type = <EV_SW>;
  49                         debounce-interval = <60>;
  50                         wakeup-source;
  51                 };
  52
  53                 converter {
  54                         label = "converter";
  55                         gpios = <&qcom_pinmux 25 GPIO_ACTIVE_LOW>;
  56                         linux,code = <BTN_0>;
  57                         linux,input-type = <EV_SW>;
  58                         debounce-interval = <60>;
  59                         wakeup-source;
  60                 };
  61         };
  62
  63         leds {
  64                 compatible = "gpio-leds";
  65                 pinctrl-0 = <&led_pins>;
  66                 pinctrl-names = "default";
  67
  68                 converter_green {
  69                         label = "green:converter";
  70                         gpios = <&qcom_pinmux 6 GPIO_ACTIVE_HIGH>;
  71                 };
  72
  73                 power_red: power_red {
  74                         label = "red:power";
  75                         gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
  76                 };
  77
  78                 active_green {
  79                         label = "green:active";
  80                         gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
  81                 };
  82
  83                 active_red {
  84                         label = "red:active";
  85                         gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
  86                 };
  87
  88                 power_green: power_green {
  89                         label = "green:power";
  90                         gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
  91                 };
  92
  93                 converter_red {
  94                         label = "red:converter";
  95                         gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
  96                 };
  97
  98                 wlan2g_green {
  99                         label = "green:wlan2g";
 100                         gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
 101                 };
 102
 103                 wlan2g_red {
 104                         label = "red:wlan2g";
 105                         gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
 106                 };
 107
 108                 wlan5g_green {
 109                         label = "green:wlan5g";
 110                         gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
 111                 };
 112
 113                 wlan5g_red {
 114                         label = "red:wlan5g";
 115                         gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
 116                 };
 117
 118                 tv_green {
 119                         label = "green:tv";
 120                         gpios = <&qcom_pinmux 64 GPIO_ACTIVE_HIGH>;
 121                 };
 122
 123                 tv_red {
 124                         label = "red:tv";
 125                         gpios = <&qcom_pinmux 65 GPIO_ACTIVE_HIGH>;
 126                 };
 127         };
 128 };
 129
 130 &CPU_SPC {
 131         status = "disabled";
 132 };
 133
 134 &adm_dma {
 135         status = "okay";
 136 };
 137
 138 &mdio0 {
 139         status = "okay";
 140
 141         pinctrl-0 = <&mdio0_pins>;
 142         pinctrl-names = "default";
 143
 144         ethernet-phy@0 {
 145                 reg = <0>;
 146                 qca,ar8327-initvals = <
 147                         0x00004 0x06000000  /* PAD0_MODE */
 148                         0x0000c 0x00080080  /* PAD6_MODE */
 149                         0x000e4 0x0006a545  /* MAC_POWER_SEL */
 150                         0x000e0 0xc74164de  /* SGMII_CTRL */
 151                         0x0007c 0x0000004e  /* PORT0_STATUS */
 152                         0x00094 0x0000004e  /* PORT6_STATUS */
 153                         >;
 154         };
 155
 156         ethernet-phy@4 {
 157                 reg = <4>;
 158         };
 159 };
 160
 161 &gmac1 {
 162         status = "okay";
 163
 164         phy-mode = "rgmii";
 165         qcom,id = <1>;
 166
 167         pinctrl-0 = <&rgmii2_pins>;
 168         pinctrl-names = "default";
 169
 170         nvmem-cells = <&macaddr_PRODUCTDATA_6>;
 171         nvmem-cell-names = "mac-address";
 172
 173         fixed-link {
 174                 speed = <1000>;
 175                 full-duplex;
 176         };
 177 };
 178
 179 &gmac2 {
 180         status = "okay";
 181
 182         phy-mode = "sgmii";
 183         qcom,id = <2>;
 184
 185         nvmem-cells = <&macaddr_PRODUCTDATA_0>;
 186         nvmem-cell-names = "mac-address";
 187
 188         fixed-link {
 189                 speed = <1000>;
 190                 full-duplex;
 191         };
 192 };
 193
 194 &gsbi5 {
 195         status = "okay";
 196
 197         qcom,mode = <GSBI_PROT_SPI>;
 198
 199         spi@1a280000 {
 200                 status = "okay";
 201
 202                 pinctrl-0 = <&spi_pins>;
 203                 pinctrl-names = "default";
 204
 205                 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
 206
 207                 flash@0 {
 208                         compatible = "jedec,spi-nor";
 209                         spi-max-frequency = <50000000>;
 210                         reg = <0>;
 211
 212                         partitions {
 213                                 compatible = "fixed-partitions";
 214                                 #address-cells = <1>;
 215                                 #size-cells = <1>;
 216
 217                                 SBL1@0 {
 218                                         label = "SBL1";
 219                                         reg = <0x0 0x20000>;
 220                                         read-only;
 221                                 };
 222
 223                                 MIBIB@20000 {
 224                                         label = "MIBIB";
 225                                         reg = <0x20000 0x20000>;
 226                                         read-only;
 227                                 };
 228
 229                                 SBL2@40000 {
 230                                         label = "SBL2";
 231                                         reg = <0x40000 0x40000>;
 232                                         read-only;
 233                                 };
 234
 235                                 SBL3@80000 {
 236                                         label = "SBL3";
 237                                         reg = <0x80000 0x80000>;
 238                                         read-only;
 239                                 };
 240
 241                                 DDRCONFIG@100000 {
 242                                         label = "DDRCONFIG";
 243                                         reg = <0x100000 0x10000>;
 244                                         read-only;
 245                                 };
 246
 247                                 SSD@110000 {
 248                                         label = "SSD";
 249                                         reg = <0x110000 0x10000>;
 250                                         read-only;
 251                                 };
 252
 253                                 TZ@120000 {
 254                                         label = "TZ";
 255                                         reg = <0x120000 0x80000>;
 256                                         read-only;
 257                                 };
 258
 259                                 RPM@1a0000 {
 260                                         label = "RPM";
 261                                         reg = <0x1a0000 0x80000>;
 262                                         read-only;
 263                                 };
 264
 265                                 APPSBL@220000 {
 266                                         label = "APPSBL";
 267                                         reg = <0x220000 0x80000>;
 268                                         read-only;
 269                                 };
 270
 271                                 APPSBLENV@2a0000 {
 272                                         label = "APPSBLENV";
 273                                         reg = <0x2a0000 0x10000>;
 274                                 };
 275
 276                                 PRODUCTDATA: PRODUCTDATA@2b0000 {
 277                                         label = "PRODUCTDATA";
 278                                         reg = <0x2b0000 0x30000>;
 279                                         read-only;
 280                                 };
 281
 282                                 ART@2e0000 {
 283                                         label = "ART";
 284                                         reg = <0x2e0000 0x40000>;
 285                                         read-only;
 286                                         compatible = "nvmem-cells";
 287                                         #address-cells = <1>;
 288                                         #size-cells = <1>;
 289
 290                                         precal_ART_1000: precal@1000 {
 291                                                 reg = <0x1000 0x2f20>;
 292                                         };
 293
 294                                         precal_ART_5000: precal@5000 {
 295                                                 reg = <0x5000 0x2f20>;
 296                                         };
 297                                 };
 298
 299                                 TP@320000 {
 300                                         label = "TP";
 301                                         reg = <0x320000 0x40000>;
 302                                         read-only;
 303                                 };
 304
 305                                 TINY@360000 {
 306                                         label = "TINY";
 307                                         reg = <0x360000 0x500000>;
 308                                         read-only;
 309                                 };
 310
 311                                 firmware@860000 {
 312                                         compatible = "denx,uimage";
 313                                         label = "firmware";
 314                                         reg = <0x860000 0x17a0000>;
 315                                 };
 316                         };
 317                 };
 318         };
 319 };
 320
 321 &hs_phy_0 {
 322         status = "okay";
 323 };
 324
 325 &ss_phy_0 {
 326         status = "okay";
 327 };
 328
 329 &usb3_0 {
 330         status = "okay";
 331
 332         pinctrl-0 = <&usb_pwr_en_pins>;
 333         pinctrl-names = "default";
 334 };
 335
 336 &hs_phy_1 {
 337         status = "okay";
 338 };
 339
 340 &ss_phy_1 {
 341         status = "okay";
 342 };
 343
 344 &usb3_1 {
 345         status = "okay";
 346 };
 347
 348 &pcie0 {
 349         status = "okay";
 350
 351         bridge@0,0 {
 352                 reg = <0x00000000 0 0 0 0>;
 353                 #address-cells = <3>;
 354                 #size-cells = <2>;
 355                 ranges;
 356
 357                 wifi@1,0 {
 358                         compatible = "pci168c,0040";
 359                         reg = <0x00010000 0 0 0 0>;
 360
 361                         nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
 362                         nvmem-cell-names = "mac-address", "pre-calibration";
 363                 };
 364         };
 365 };
 366
 367 &pcie1 {
 368         status = "okay";
 369         max-link-speed = <1>;
 370
 371         bridge@0,0 {
 372                 reg = <0x00000000 0 0 0 0>;
 373                 #address-cells = <3>;
 374                 #size-cells = <2>;
 375                 ranges;
 376
 377                 wifi@1,0 {
 378                         compatible = "pci168c,0040";
 379                         reg = <0x00010000 0 0 0 0>;
 380
 381                         nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
 382                         nvmem-cell-names = "mac-address", "pre-calibration";
 383                 };
 384         };
 385 };
 386
 387 &qcom_pinmux {
 388         button_pins: button_pins {
 389                 mux {
 390                         pins = "gpio16", "gpio54", "gpio24", "gpio25";
 391                         function = "gpio";
 392                         drive-strength = <2>;
 393                         bias-pull-up;
 394                 };
 395         };
 396
 397         led_pins: led_pins {
 398                 mux {
 399                         pins = "gpio6", "gpio7", "gpio8", "gpio9", "gpio14",
 400                                 "gpio15", "gpio55", "gpio56", "gpio57", "gpio58",
 401                                 "gpio64", "gpio65";
 402                         function = "gpio";
 403                         drive-strength = <2>;
 404                         bias-pull-down;
 405                 };
 406         };
 407
 408         spi_pins: spi_pins {
 409                 mux {
 410                         pins = "gpio18", "gpio19", "gpio21";
 411                         function = "gsbi5";
 412                         bias-pull-down;
 413                 };
 414
 415                 data {
 416                         pins = "gpio18", "gpio19";
 417                         drive-strength = <10>;
 418                 };
 419
 420                 cs {
 421                         pins = "gpio20";
 422                         drive-strength = <10>;
 423                         bias-pull-up;
 424                 };
 425
 426                 clk {
 427                         pins = "gpio21";
 428                         drive-strength = <12>;
 429                 };
 430         };
 431
 432         usb_pwr_en_pins: usb_pwr_en_pins {
 433                 mux {
 434                         pins = "gpio22";
 435                         function = "gpio";
 436                         drive-strength = <2>;
 437                         bias-pull-down;
 438                         output-high;
 439                 };
 440         };
 441 };
 442
 443 &PRODUCTDATA {
 444         compatible = "nvmem-cells";
 445         #address-cells = <1>;
 446         #size-cells = <1>;
 447
 448         macaddr_PRODUCTDATA_0: macaddr@0 {
 449                 reg = <0x0 0x6>;
 450         };
 451
 452         macaddr_PRODUCTDATA_6: macaddr@6 {
 453                 reg = <0x6 0x6>;
 454         };
 455
 456         macaddr_PRODUCTDATA_c: macaddr@c {
 457                 reg = <0xc 0x6>;
 458         };
 459
 460         macaddr_PRODUCTDATA_12: macaddr@12 {
 461                 reg = <0x12 0x6>;
 462         };
 463 };