ipq806x: 5.15: drop useless kernel patches and dts files
[openwrt/openwrt.git] / target / linux / ipq806x / files-6.1 / arch / arm / boot / dts / qcom-ipq8064-unifi-ac-hd.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq8064-v2.0-smb208.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "Ubiquiti UniFi AC HD";
10 compatible = "ubnt,unifi-ac-hd", "qcom,ipq8064";
11
12 aliases {
13 label-mac-device = &gmac2;
14 led-boot = &led_dome_white;
15 led-failsafe = &led_dome_white;
16 led-running = &led_dome_blue;
17 led-upgrade = &led_dome_blue;
18 mdio-gpio0 = &mdio0;
19 ethernet0 = &gmac2;
20 ethernet1 = &gmac1;
21 };
22
23 leds {
24 compatible = "gpio-leds";
25 pinctrl-0 = <&led_pins>;
26 pinctrl-names = "default";
27
28 led_dome_blue: dome_blue {
29 label = "blue:dome";
30 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
31 };
32
33 led_dome_white: dome_white {
34 label = "white:dome";
35 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
36 };
37 };
38
39 keys {
40 compatible = "gpio-keys";
41 pinctrl-0 = <&button_pins>;
42 pinctrl-names = "default";
43
44 reset {
45 label = "reset";
46 gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
47 linux,code = <KEY_RESTART>;
48 debounce-interval = <60>;
49 wakeup-source;
50 };
51 };
52 };
53
54 &qcom_pinmux {
55 button_pins: button_pins {
56 mux {
57 pins = "gpio68";
58 function = "gpio";
59 drive-strength = <2>;
60 bias-pull-up;
61 };
62 };
63
64 led_pins: led_pins {
65 mux {
66 pins = "gpio9", "gpio53";
67 function = "gpio";
68 drive-strength = <2>;
69 bias-pull-down;
70 output-low;
71 };
72 };
73
74 spi_pins: spi_pins {
75 mux {
76 pins = "gpio18", "gpio19", "gpio21";
77 function = "gsbi5";
78 drive-strength = <10>;
79 bias-none;
80 };
81
82 cs {
83 pins = "gpio20";
84 drive-strength = <12>;
85 };
86 };
87 };
88
89 &CPU_SPC {
90 status = "disabled";
91 };
92
93 &gsbi5 {
94 status = "okay";
95
96 qcom,mode = <GSBI_PROT_SPI>;
97
98 spi@1a280000 {
99 status = "okay";
100
101 pinctrl-0 = <&spi_pins>;
102 pinctrl-names = "default";
103 cs-gpios = <&qcom_pinmux 20 0>;
104
105 flash@0 {
106 compatible = "mx25u25635f", "jedec,spi-nor";
107 #address-cells = <1>;
108 #size-cells = <1>;
109 spi-max-frequency = <50000000>;
110 reg = <0>;
111 m25p,fast-read;
112
113 partitions {
114 compatible = "fixed-partitions";
115 #address-cells = <1>;
116 #size-cells = <1>;
117
118 partition@0 {
119 label = "SBL1";
120 reg = <0x0 0x20000>;
121 read-only;
122 };
123
124 partition@20000 {
125 label = "MIBIB";
126 reg = <0x20000 0x10000>;
127 read-only;
128 };
129
130 partition@30000 {
131 label = "SBL2";
132 reg = <0x30000 0x20000>;
133 read-only;
134 };
135
136 partition@50000 {
137 label = "SBL3";
138 reg = <0x50000 0x30000>;
139 read-only;
140 };
141
142 partition@80000 {
143 label = "DDRCONFIG";
144 reg = <0x80000 0x10000>;
145 read-only;
146 };
147
148 partition@90000 {
149 label = "SSD";
150 reg = <0x90000 0x10000>;
151 read-only;
152 };
153
154 partition@a0000 {
155 label = "TZ";
156 reg = <0xa0000 0x30000>;
157 read-only;
158 };
159
160 partition@d0000 {
161 label = "RPM";
162 reg = <0xd0000 0x20000>;
163 read-only;
164 };
165
166 partition@f0000 {
167 label = "APPSBL";
168 reg = <0xf0000 0xc0000>;
169 read-only;
170 };
171
172 partition@1b0000 {
173 label = "APPSBLENV";
174 reg = <0x1b0000 0x10000>;
175 read-only;
176 };
177
178 eeprom: partition@1c0000 {
179 label = "EEPROM";
180 reg = <0x1c0000 0x10000>;
181 read-only;
182 };
183
184 partition@1d0000 {
185 label = "bootselect";
186 reg = <0x1d0000 0x10000>;
187 };
188
189 partition@1e0000 {
190 compatible = "denx,fit";
191 label = "firmware";
192 reg = <0x1e0000 0xe70000>;
193 };
194
195 partition@1050000 {
196 label = "kernel1";
197 reg = <0x1050000 0xe70000>;
198 read-only;
199 };
200
201 partition@1ec0000 {
202 label = "debug";
203 reg = <0x1ec0000 0x100000>;
204 read-only;
205 };
206
207 partition@1fc0000 {
208 label = "cfg";
209 reg = <0x1fc0000 0x40000>;
210 read-only;
211 };
212 };
213 };
214 };
215 };
216
217 &adm_dma {
218 status = "okay";
219 };
220
221 &nand {
222 status = "okay";
223
224 nand-ecc-strength = <4>;
225 nand-bus-width = <8>;
226 };
227
228 &mdio0 {
229 status = "okay";
230
231 pinctrl-0 = <&mdio0_pins>;
232 pinctrl-names = "default";
233
234 phy4: ethernet-phy@4 {
235 reg = <4>;
236 };
237
238 phy5: ethernet-phy@5 {
239 reg = <5>;
240 };
241 };
242
243 &gmac1 {
244 status = "okay";
245
246 mdiobus = <&mdio0>;
247 phy-handle = <&phy5>;
248 phy-mode = "sgmii";
249 qcom,id = <1>;
250
251 nvmem-cells = <&macaddr_eeprom_6>;
252 nvmem-cell-names = "mac-address";
253 };
254
255 &gmac2 {
256 status = "okay";
257
258 mdiobus = <&mdio0>;
259 phy-handle = <&phy4>;
260 phy-mode = "sgmii";
261 qcom,id = <2>;
262
263 nvmem-cells = <&macaddr_eeprom_0>;
264 nvmem-cell-names = "mac-address";
265 };
266
267 &pcie0 {
268 status = "okay";
269 };
270
271 &pcie1 {
272 status = "okay";
273 };
274
275 &tcsr {
276 status = "okay";
277 };
278
279 &hs_phy_0 {
280 status = "okay";
281 };
282
283 &ss_phy_0 {
284 status = "okay";
285 };
286
287 &usb3_0 {
288 status = "okay";
289 };
290
291 &hs_phy_1 {
292 status = "okay";
293 };
294
295 &ss_phy_1 {
296 status = "okay";
297 };
298
299 &usb3_1 {
300 status = "okay";
301 };
302
303 &eeprom {
304 compatible = "nvmem-cells";
305 #address-cells = <1>;
306 #size-cells = <1>;
307
308 macaddr_eeprom_0: macaddr@0 {
309 reg = <0x0 0x6>;
310 };
311
312 macaddr_eeprom_6: macaddr@6 {
313 reg = <0x6 0x6>;
314 };
315 };