ipq806x: move to kernel 6.1 by default
[openwrt/openwrt.git] / target / linux / ipq806x / files-5.15 / arch / arm / boot / dts / qcom-ipq8064-wpq864.dts
1 // SPDX-License-Identifier: BSD-3-Clause
2 /*
3 * Copyright (C) 2017 Christian Mehlis <christian@m3hlis.de>
4 * Copyright (C) 2018 Mathias Kresin <dev@kresin.me>
5 * All rights reserved.
6 */
7
8 #include "qcom-ipq8064-v1.0.dtsi"
9
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/soc/qcom,tcsr.h>
12
13 / {
14 compatible = "compex,wpq864", "qcom,ipq8064";
15 model = "Compex WPQ864";
16
17 aliases {
18 mdio-gpio0 = &mdio0;
19 ethernet0 = &gmac1;
20 ethernet1 = &gmac0;
21
22 led-boot = &led_pass;
23 led-failsafe = &led_fail;
24 led-running = &led_pass;
25 led-upgrade = &led_pass;
26 };
27
28 leds {
29 compatible = "gpio-leds";
30
31 pinctrl-0 = <&led_pins>;
32 pinctrl-names = "default";
33
34 rss4 {
35 label = "green:rss4";
36 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
37 };
38
39 rss3 {
40 label = "green:rss3";
41 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
42 default-state = "keep";
43 };
44
45 rss2 {
46 label = "orange:rss2";
47 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
48 };
49
50 rss1 {
51 label = "red:rss1";
52 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
53 };
54
55 led_pass: pass {
56 label = "green:pass";
57 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
58 };
59
60 led_fail: fail {
61 label = "green:fail";
62 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
63 };
64
65 usb {
66 label = "green:usb";
67 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
68 };
69
70 usb-pcie {
71 label = "green:usb-pcie";
72 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
73 };
74 };
75
76 keys {
77 compatible = "gpio-keys";
78
79 pinctrl-0 = <&button_pins>;
80 pinctrl-names = "default";
81
82 reset {
83 label = "reset";
84 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
85 linux,code = <KEY_RESTART>;
86 debounce-interval = <60>;
87 wakeup-source;
88 };
89 };
90
91 beeper {
92 compatible = "gpio-beeper";
93
94 pinctrl-0 = <&beeper_pins>;
95 pinctrl-names = "default";
96
97 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
98 };
99 };
100
101 &rpm {
102 pinctrl-0 = <&rpm_pins>;
103 pinctrl-names = "default";
104 };
105
106 &nand {
107 status = "okay";
108
109 pinctrl-0 = <&nand_pins>;
110 pinctrl-names = "default";
111
112 mt29f2g08abbeah4@0 {
113 compatible = "qcom,nandcs";
114
115 reg = <0>;
116
117 nand-ecc-strength = <4>;
118 nand-bus-width = <8>;
119 nand-ecc-step-size = <512>;
120
121 nand-is-boot-medium;
122 qcom,boot-partitions = <0x0 0x1180000 0x5340000 0x10c0000>;
123
124 partitions {
125 compatible = "fixed-partitions";
126 #address-cells = <1>;
127 #size-cells = <1>;
128
129 partition@0 {
130 label = "0:SBL1";
131 reg = <0x0000000 0x0040000>;
132 read-only;
133 };
134
135 partition@40000 {
136 label = "0:MIBIB";
137 reg = <0x0040000 0x0140000>;
138 read-only;
139 };
140
141 partition@180000 {
142 label = "0:SBL2";
143 reg = <0x0180000 0x0140000>;
144 read-only;
145 };
146
147 partition@2c0000 {
148 label = "0:SBL3";
149 reg = <0x02c0000 0x0280000>;
150 read-only;
151 };
152
153 partition@540000 {
154 label = "0:DDRCONFIG";
155 reg = <0x0540000 0x0120000>;
156 read-only;
157 };
158
159 partition@660000 {
160 label = "0:SSD";
161 reg = <0x0660000 0x0120000>;
162 read-only;
163 };
164
165 partition@780000 {
166 label = "0:TZ";
167 reg = <0x0780000 0x0280000>;
168 read-only;
169 };
170
171 partition@a00000 {
172 label = "0:RPM";
173 reg = <0x0a00000 0x0280000>;
174 read-only;
175 };
176
177 partition@c80000 {
178 label = "0:APPSBL";
179 reg = <0x0c80000 0x0500000>;
180 read-only;
181 };
182
183 partition@1180000 {
184 label = "0:APPSBLENV";
185 reg = <0x1180000 0x0080000>;
186 };
187
188 partition@1200000 {
189 label = "0:ART";
190 reg = <0x1200000 0x0140000>;
191 };
192
193 partition@1340000 {
194 label = "ubi";
195 reg = <0x1340000 0x4000000>;
196 };
197
198 partition@5340000 {
199 label = "0:BOOTCONFIG";
200 reg = <0x5340000 0x0060000>;
201 };
202
203 partition@53a0000 {
204 label = "0:SBL2_1";
205 reg = <0x53a0000 0x0140000>;
206 read-only;
207 };
208
209 partition@54e0000 {
210 label = "0:SBL3_1";
211 reg = <0x54e0000 0x0280000>;
212 read-only;
213 };
214
215 partition@5760000 {
216 label = "0:DDRCONFIG_1";
217 reg = <0x5760000 0x0120000>;
218 read-only;
219 };
220
221 partition@5880000 {
222 label = "0:SSD_1";
223 reg = <0x5880000 0x0120000>;
224 read-only;
225 };
226
227 partition@59a0000 {
228 label = "0:TZ_1";
229 reg = <0x59a0000 0x0280000>;
230 read-only;
231 };
232
233 partition@5c20000 {
234 label = "0:RPM_1";
235 reg = <0x5c20000 0x0280000>;
236 read-only;
237 };
238
239 partition@5ea0000 {
240 label = "0:BOOTCONFIG1";
241 reg = <0x5ea0000 0x0060000>;
242 };
243
244 partition@5f00000 {
245 label = "0:APPSBL_1";
246 reg = <0x5f00000 0x0500000>;
247 read-only;
248 };
249
250 partition@6400000 {
251 label = "ubi_1";
252 reg = <0x6400000 0x4000000>;
253 };
254
255 partition@a400000 {
256 label = "unused";
257 reg = <0xa400000 0x5c00000>;
258 };
259 };
260 };
261 };
262
263 &adm_dma {
264 status = "okay";
265 };
266
267 &mdio0 {
268 status = "okay";
269
270 pinctrl-0 = <&mdio0_pins>;
271 pinctrl-names = "default";
272
273 ethernet-phy@0 {
274 reg = <0>;
275 qca,ar8327-initvals = <
276 0x00004 0x7600000 /* PAD0_MODE */
277 0x00008 0x1000000 /* PAD5_MODE */
278 0x0000c 0x80 /* PAD6_MODE */
279 0x000e4 0x6a545 /* MAC_POWER_SEL */
280 0x000e0 0xc74164de /* SGMII_CTRL */
281 0x0007c 0x4e /* PORT0_STATUS */
282 0x00094 0x4e /* PORT6_STATUS */
283 >;
284 };
285
286 ethernet-phy@4 {
287 reg = <4>;
288 };
289 };
290
291 &gmac1 {
292 status = "okay";
293
294 pinctrl-0 = <&rgmii2_pins>;
295 pinctrl-names = "default";
296
297 phy-mode = "rgmii";
298 qcom,id = <1>;
299
300 fixed-link {
301 speed = <1000>;
302 full-duplex;
303 };
304 };
305
306 &gmac2 {
307 status = "okay";
308
309 phy-mode = "sgmii";
310 qcom,id = <2>;
311
312 fixed-link {
313 speed = <1000>;
314 full-duplex;
315 };
316 };
317
318 &gsbi4_serial {
319 pinctrl-0 = <&uart0_pins>;
320 pinctrl-names = "default";
321 };
322
323 &flash {
324 compatible = "jedec,spi-nor";
325 };
326
327 &sata_phy {
328 status = "disabled";
329 };
330
331 &sata {
332 status = "disabled";
333 };
334
335 &hs_phy_0 {
336 status = "okay";
337 };
338
339 &ss_phy_0 {
340 status = "okay";
341
342 rx_eq = <2>;
343 tx_deamp_3_5db = <32>;
344 mpll = <160>;
345 };
346
347 &usb3_0 {
348 status = "okay";
349 };
350
351 &hs_phy_1 {
352 status = "okay";
353 };
354
355 &ss_phy_1 {
356 status = "okay";
357
358 rx_eq = <2>;
359 tx_deamp_3_5db = <32>;
360 mpll = <160>;
361 };
362
363 &usb3_1 {
364 status = "okay";
365 };
366
367 &pcie0 {
368 status = "okay";
369
370 /delete-property/ pinctrl-0;
371 /delete-property/ pinctrl-names;
372 /delete-property/ perst-gpios;
373 };
374
375 &pcie1 {
376 status = "okay";
377 };
378
379 &pcie2 {
380 status = "okay";
381
382 /delete-property/ pinctrl-0;
383 /delete-property/ pinctrl-names;
384 /delete-property/ perst-gpios;
385 };
386
387 &qcom_pinmux {
388 pinctrl-names = "default";
389 pinctrl-0 = <&state_default>;
390
391 state_default: pinctrl0 {
392 pcie0_pcie2_perst {
393 pins = "gpio3";
394 function = "gpio";
395 drive-strength = <2>;
396 bias-disable;
397 output-high;
398 };
399 };
400
401 led_pins: led_pins {
402 mux {
403 pins = "gpio7", "gpio8", "gpio9", "gpio22",
404 "gpio23", "gpio24", "gpio25", "gpio53";
405 function = "gpio";
406 drive-strength = <2>;
407 bias-pull-up;
408 };
409 };
410
411 button_pins: button_pins {
412 mux {
413 pins = "gpio54";
414 function = "gpio";
415 drive-strength = <2>;
416 bias-pull-up;
417 };
418 };
419
420 beeper_pins: beeper_pins {
421 mux {
422 pins = "gpio55";
423 function = "gpio";
424 drive-strength = <2>;
425 bias-pull-up;
426 };
427 };
428
429 rpm_pins: rpm_pins {
430 mux {
431 pins = "gpio12", "gpio13";
432 function = "gsbi4";
433 drive-strength = <10>;
434 bias-disable;
435 };
436 };
437
438 uart0_pins: uart0_pins {
439 mux {
440 pins = "gpio10", "gpio11";
441 function = "gsbi4";
442 drive-strength = <10>;
443 bias-disable;
444 };
445 };
446
447 spi_pins: spi_pins {
448 mux {
449 pins = "gpio18", "gpio19";
450 function = "gsbi5";
451 drive-strength = <10>;
452 bias-pull-down;
453 };
454
455 clk {
456 pins = "gpio21";
457 function = "gsbi5";
458 drive-strength = <12>;
459 bias-pull-down;
460 };
461
462 cs {
463 pins = "gpio20";
464 function = "gpio";
465 drive-strength = <10>;
466 bias-pull-up;
467 };
468 };
469 };
470
471 &tcsr {
472 qcom,usb-ctrl-select = <TCSR_USB_SELECT_USB3_DUAL>;
473 };