target/linux/generic/pending-5.10/850-0011-PCI-aardvark-Fix-setting-MSI-address.patch

   1 From fa73c200f181436eab859374657c53a73778d8ad Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
   3 Date: Fri, 26 Mar 2021 17:35:44 +0100
   4 Subject: [PATCH] PCI: aardvark: Fix setting MSI address
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 MSI address for receiving MSI interrupts needs to be correctly set before
  10 enabling processing of MSI interrupts.
  11
  12 Move code for setting PCIE_MSI_ADDR_LOW_REG and PCIE_MSI_ADDR_HIGH_REG
  13 from advk_pcie_init_msi_irq_domain() to advk_pcie_setup_hw(), before
  14 enabling PCIE_CORE_CTRL2_MSI_ENABLE.
  15
  16 After this we can remove the now unused member msi_msg, which was used
  17 only for MSI doorbell address. MSI address can be any address which cannot
  18 be used to DMA to. So change it to the address of the main struct advk_pcie.
  19
  20 Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver")
  21 Signed-off-by: Pali Rohár <pali@kernel.org>
  22 Acked-by: Marc Zyngier <maz@kernel.org>
  23 Signed-off-by: Marek Behún <kabel@kernel.org>
  24 Cc: stable@vger.kernel.org # f21a8b1b6837 ("PCI: aardvark: Move to MSI handling using generic MSI support")
  25 ---
  26  drivers/pci/controller/pci-aardvark.c | 21 +++++++++------------
  27  1 file changed, 9 insertions(+), 12 deletions(-)
  28
  29 --- a/drivers/pci/controller/pci-aardvark.c
  30 +++ b/drivers/pci/controller/pci-aardvark.c
  31 @@ -284,7 +284,6 @@ struct advk_pcie {
  32         raw_spinlock_t msi_irq_lock;
  33         DECLARE_BITMAP(msi_used, MSI_IRQ_NUM);
  34         struct mutex msi_used_lock;
  35 -       u16 msi_msg;
  36         int link_gen;
  37         struct pci_bridge_emul bridge;
  38         struct gpio_desc *reset_gpio;
  39 @@ -479,6 +478,7 @@ static void advk_pcie_disable_ob_win(str
  40
  41  static void advk_pcie_setup_hw(struct advk_pcie *pcie)
  42  {
  43 +       phys_addr_t msi_addr;
  44         u32 reg;
  45         int i;
  46
  47 @@ -567,6 +567,11 @@ static void advk_pcie_setup_hw(struct ad
  48         reg |= LANE_COUNT_1;
  49         advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
  50
  51 +       /* Set MSI address */
  52 +       msi_addr = virt_to_phys(pcie);
  53 +       advk_writel(pcie, lower_32_bits(msi_addr), PCIE_MSI_ADDR_LOW_REG);
  54 +       advk_writel(pcie, upper_32_bits(msi_addr), PCIE_MSI_ADDR_HIGH_REG);
  55 +
  56         /* Enable MSI */
  57         reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);
  58         reg |= PCIE_CORE_CTRL2_MSI_ENABLE;
  59 @@ -1186,10 +1191,10 @@ static void advk_msi_irq_compose_msi_msg
  60                                          struct msi_msg *msg)
  61  {
  62         struct advk_pcie *pcie = irq_data_get_irq_chip_data(data);
  63 -       phys_addr_t msi_msg = virt_to_phys(&pcie->msi_msg);
  64 +       phys_addr_t msi_addr = virt_to_phys(pcie);
  65
  66 -       msg->address_lo = lower_32_bits(msi_msg);
  67 -       msg->address_hi = upper_32_bits(msi_msg);
  68 +       msg->address_lo = lower_32_bits(msi_addr);
  69 +       msg->address_hi = upper_32_bits(msi_addr);
  70         msg->data = data->hwirq;
  71  }
  72
  73 @@ -1348,18 +1353,10 @@ static struct msi_domain_info advk_msi_d
  74  static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie)
  75  {
  76         struct device *dev = &pcie->pdev->dev;
  77 -       phys_addr_t msi_msg_phys;
  78
  79         raw_spin_lock_init(&pcie->msi_irq_lock);
  80         mutex_init(&pcie->msi_used_lock);
  81
  82 -       msi_msg_phys = virt_to_phys(&pcie->msi_msg);
  83 -
  84 -       advk_writel(pcie, lower_32_bits(msi_msg_phys),
  85 -                   PCIE_MSI_ADDR_LOW_REG);
  86 -       advk_writel(pcie, upper_32_bits(msi_msg_phys),
  87 -                   PCIE_MSI_ADDR_HIGH_REG);
  88 -
  89         pcie->msi_inner_domain =
  90                 irq_domain_add_linear(NULL, MSI_IRQ_NUM,
  91                                       &advk_msi_domain_ops, pcie);