target/linux/generic/backport-5.15/777-v6.2-03-Revert-net-dsa-qca8k-cache-lo-and-hi-for-mdio-write.patch

   1 From 03cb9e6d0b32b768e3d9d473c5c4ca1100877664 Mon Sep 17 00:00:00 2001
   2 From: Christian Marangi <ansuelsmth@gmail.com>
   3 Date: Thu, 29 Dec 2022 17:33:34 +0100
   4 Subject: [PATCH 3/5] Revert "net: dsa: qca8k: cache lo and hi for mdio write"
   5
   6 This reverts commit 2481d206fae7884cd07014fd1318e63af35e99eb.
   7
   8 The Documentation is very confusing about the topic.
   9 The cache logic for hi and lo is wrong and actually miss some regs to be
  10 actually written.
  11
  12 What the Documentation actually intended was that it's possible to skip
  13 writing hi OR lo if half of the reg is not needed to be written or read.
  14
  15 Revert the change in favor of a better and correct implementation.
  16
  17 Reported-by: Ronald Wahl <ronald.wahl@raritan.com>
  18 Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
  19 Cc: stable@vger.kernel.org # v5.18+
  20 Signed-off-by: David S. Miller <davem@davemloft.net>
  21 ---
  22  drivers/net/dsa/qca/qca8k-8xxx.c | 61 +++++++-------------------------
  23  drivers/net/dsa/qca/qca8k.h      |  5 ---
  24  2 files changed, 12 insertions(+), 54 deletions(-)
  25
  26 --- a/drivers/net/dsa/qca/qca8k-8xxx.c
  27 +++ b/drivers/net/dsa/qca/qca8k-8xxx.c
  28 @@ -37,44 +37,6 @@ qca8k_split_addr(u32 regaddr, u16 *r1, u
  29  }
  30
  31  static int
  32 -qca8k_set_lo(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 lo)
  33 -{
  34 -       u16 *cached_lo = &priv->mdio_cache.lo;
  35 -       struct mii_bus *bus = priv->bus;
  36 -       int ret;
  37 -
  38 -       if (lo == *cached_lo)
  39 -               return 0;
  40 -
  41 -       ret = bus->write(bus, phy_id, regnum, lo);
  42 -       if (ret < 0)
  43 -               dev_err_ratelimited(&bus->dev,
  44 -                                   "failed to write qca8k 32bit lo register\n");
  45 -
  46 -       *cached_lo = lo;
  47 -       return 0;
  48 -}
  49 -
  50 -static int
  51 -qca8k_set_hi(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 hi)
  52 -{
  53 -       u16 *cached_hi = &priv->mdio_cache.hi;
  54 -       struct mii_bus *bus = priv->bus;
  55 -       int ret;
  56 -
  57 -       if (hi == *cached_hi)
  58 -               return 0;
  59 -
  60 -       ret = bus->write(bus, phy_id, regnum, hi);
  61 -       if (ret < 0)
  62 -               dev_err_ratelimited(&bus->dev,
  63 -                                   "failed to write qca8k 32bit hi register\n");
  64 -
  65 -       *cached_hi = hi;
  66 -       return 0;
  67 -}
  68 -
  69 -static int
  70  qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val)
  71  {
  72         int ret;
  73 @@ -97,7 +59,7 @@ qca8k_mii_read32(struct mii_bus *bus, in
  74  }
  75
  76  static void
  77 -qca8k_mii_write32(struct qca8k_priv *priv, int phy_id, u32 regnum, u32 val)
  78 +qca8k_mii_write32(struct mii_bus *bus, int phy_id, u32 regnum, u32 val)
  79  {
  80         u16 lo, hi;
  81         int ret;
  82 @@ -105,9 +67,12 @@ qca8k_mii_write32(struct qca8k_priv *pri
  83         lo = val & 0xffff;
  84         hi = (u16)(val >> 16);
  85
  86 -       ret = qca8k_set_lo(priv, phy_id, regnum, lo);
  87 +       ret = bus->write(bus, phy_id, regnum, lo);
  88         if (ret >= 0)
  89 -               ret = qca8k_set_hi(priv, phy_id, regnum + 1, hi);
  90 +               ret = bus->write(bus, phy_id, regnum + 1, hi);
  91 +       if (ret < 0)
  92 +               dev_err_ratelimited(&bus->dev,
  93 +                                   "failed to write qca8k 32bit register\n");
  94  }
  95
  96  static int
  97 @@ -442,7 +407,7 @@ qca8k_regmap_write(void *ctx, uint32_t r
  98         if (ret < 0)
  99                 goto exit;
 100
 101 -       qca8k_mii_write32(priv, 0x10 | r2, r1, val);
 102 +       qca8k_mii_write32(bus, 0x10 | r2, r1, val);
 103
 104  exit:
 105         mutex_unlock(&bus->mdio_lock);
 106 @@ -475,7 +440,7 @@ qca8k_regmap_update_bits(void *ctx, uint
 107
 108         val &= ~mask;
 109         val |= write_val;
 110 -       qca8k_mii_write32(priv, 0x10 | r2, r1, val);
 111 +       qca8k_mii_write32(bus, 0x10 | r2, r1, val);
 112
 113  exit:
 114         mutex_unlock(&bus->mdio_lock);
 115 @@ -750,14 +715,14 @@ qca8k_mdio_write(struct qca8k_priv *priv
 116         if (ret)
 117                 goto exit;
 118
 119 -       qca8k_mii_write32(priv, 0x10 | r2, r1, val);
 120 +       qca8k_mii_write32(bus, 0x10 | r2, r1, val);
 121
 122         ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL,
 123                                    QCA8K_MDIO_MASTER_BUSY);
 124
 125  exit:
 126         /* even if the busy_wait timeouts try to clear the MASTER_EN */
 127 -       qca8k_mii_write32(priv, 0x10 | r2, r1, 0);
 128 +       qca8k_mii_write32(bus, 0x10 | r2, r1, 0);
 129
 130         mutex_unlock(&bus->mdio_lock);
 131
 132 @@ -787,7 +752,7 @@ qca8k_mdio_read(struct qca8k_priv *priv,
 133         if (ret)
 134                 goto exit;
 135
 136 -       qca8k_mii_write32(priv, 0x10 | r2, r1, val);
 137 +       qca8k_mii_write32(bus, 0x10 | r2, r1, val);
 138
 139         ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL,
 140                                    QCA8K_MDIO_MASTER_BUSY);
 141 @@ -798,7 +763,7 @@ qca8k_mdio_read(struct qca8k_priv *priv,
 142
 143  exit:
 144         /* even if the busy_wait timeouts try to clear the MASTER_EN */
 145 -       qca8k_mii_write32(priv, 0x10 | r2, r1, 0);
 146 +       qca8k_mii_write32(bus, 0x10 | r2, r1, 0);
 147
 148         mutex_unlock(&bus->mdio_lock);
 149
 150 @@ -1914,8 +1879,6 @@ qca8k_sw_probe(struct mdio_device *mdiod
 151         }
 152
 153         priv->mdio_cache.page = 0xffff;
 154 -       priv->mdio_cache.lo = 0xffff;
 155 -       priv->mdio_cache.hi = 0xffff;
 156
 157         /* Check the detected switch id */
 158         ret = qca8k_read_switch_id(priv);
 159 --- a/drivers/net/dsa/qca/qca8k.h
 160 +++ b/drivers/net/dsa/qca/qca8k.h
 161 @@ -375,11 +375,6 @@ struct qca8k_mdio_cache {
 162   * mdio writes
 163   */
 164         u16 page;
 165 -/* lo and hi can also be cached and from Documentation we can skip one
 166 - * extra mdio write if lo or hi is didn't change.
 167 - */
 168 -       u16 lo;
 169 -       u16 hi;
 170  };
 171
 172  struct qca8k_priv {