target/linux/generic/backport-5.15/752-15-v6.7-net-ethernet-mtk_wed-refactor-mtk_wed_check_wfdma_rx.patch

   1 From: Lorenzo Bianconi <lorenzo@kernel.org>
   2 Date: Mon, 18 Sep 2023 12:29:14 +0200
   3 Subject: [PATCH] net: ethernet: mtk_wed: refactor mtk_wed_check_wfdma_rx_fill
   4  routine
   5
   6 Refactor mtk_wed_check_wfdma_rx_fill() in order to be reused adding HW
   7 receive offload support for MT7988 SoC.
   8
   9 Co-developed-by: Sujuan Chen <sujuan.chen@mediatek.com>
  10 Signed-off-by: Sujuan Chen <sujuan.chen@mediatek.com>
  11 Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
  12 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
  13 ---
  14
  15 --- a/drivers/net/ethernet/mediatek/mtk_wed.c
  16 +++ b/drivers/net/ethernet/mediatek/mtk_wed.c
  17 @@ -585,22 +585,15 @@ mtk_wed_set_512_support(struct mtk_wed_d
  18         }
  19  }
  20
  21 -#define MTK_WFMDA_RX_DMA_EN    BIT(2)
  22 -static void
  23 -mtk_wed_check_wfdma_rx_fill(struct mtk_wed_device *dev, int idx)
  24 +static int
  25 +mtk_wed_check_wfdma_rx_fill(struct mtk_wed_device *dev,
  26 +                           struct mtk_wed_ring *ring)
  27  {
  28 -       u32 val;
  29         int i;
  30
  31 -       if (!(dev->rx_ring[idx].flags & MTK_WED_RING_CONFIGURED))
  32 -               return; /* queue is not configured by mt76 */
  33 -
  34         for (i = 0; i < 3; i++) {
  35 -               u32 cur_idx;
  36 +               u32 cur_idx = readl(ring->wpdma + MTK_WED_RING_OFS_CPU_IDX);
  37
  38 -               cur_idx = wed_r32(dev,
  39 -                                 MTK_WED_WPDMA_RING_RX_DATA(idx) +
  40 -                                 MTK_WED_RING_OFS_CPU_IDX);
  41                 if (cur_idx == MTK_WED_RX_RING_SIZE - 1)
  42                         break;
  43
  44 @@ -609,12 +602,10 @@ mtk_wed_check_wfdma_rx_fill(struct mtk_w
  45
  46         if (i == 3) {
  47                 dev_err(dev->hw->dev, "rx dma enable failed\n");
  48 -               return;
  49 +               return -ETIMEDOUT;
  50         }
  51
  52 -       val = wifi_r32(dev, dev->wlan.wpdma_rx_glo - dev->wlan.phy_base) |
  53 -             MTK_WFMDA_RX_DMA_EN;
  54 -       wifi_w32(dev, dev->wlan.wpdma_rx_glo - dev->wlan.phy_base, val);
  55 +       return 0;
  56  }
  57
  58  static void
  59 @@ -1545,6 +1536,7 @@ mtk_wed_configure_irq(struct mtk_wed_dev
  60         wed_w32(dev, MTK_WED_INT_MASK, irq_mask);
  61  }
  62
  63 +#define MTK_WFMDA_RX_DMA_EN    BIT(2)
  64  static void
  65  mtk_wed_dma_enable(struct mtk_wed_device *dev)
  66  {
  67 @@ -1632,8 +1624,26 @@ mtk_wed_dma_enable(struct mtk_wed_device
  68                 wdma_set(dev, MTK_WDMA_WRBK_TX_CFG, MTK_WDMA_WRBK_TX_CFG_WRBK_EN);
  69         }
  70
  71 -       for (i = 0; i < MTK_WED_RX_QUEUES; i++)
  72 -               mtk_wed_check_wfdma_rx_fill(dev, i);
  73 +       for (i = 0; i < MTK_WED_RX_QUEUES; i++) {
  74 +               struct mtk_wed_ring *ring = &dev->rx_ring[i];
  75 +               u32 val;
  76 +
  77 +               if (!(ring->flags & MTK_WED_RING_CONFIGURED))
  78 +                       continue; /* queue is not configured by mt76 */
  79 +
  80 +               if (mtk_wed_check_wfdma_rx_fill(dev, ring)) {
  81 +                       dev_err(dev->hw->dev,
  82 +                               "rx_ring(%d) dma enable failed\n", i);
  83 +                       continue;
  84 +               }
  85 +
  86 +               val = wifi_r32(dev,
  87 +                              dev->wlan.wpdma_rx_glo -
  88 +                              dev->wlan.phy_base) | MTK_WFMDA_RX_DMA_EN;
  89 +               wifi_w32(dev,
  90 +                        dev->wlan.wpdma_rx_glo - dev->wlan.phy_base,
  91 +                        val);
  92 +       }
  93  }
  94
  95  static void