target/linux/generic/backport-5.15/733-v6.2-09-net-mtk_eth_soc-add-advertisement-programming.patch

   1 From c125c66ea71b9377ae2478c4f1b87b180cc5c6ef Mon Sep 17 00:00:00 2001
   2 From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
   3 Date: Thu, 27 Oct 2022 14:11:18 +0100
   4 Subject: [PATCH 08/10] net: mtk_eth_soc: add advertisement programming
   5
   6 Program the advertisement into the mtk PCS block.
   7
   8 Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
   9 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  10 ---
  11  drivers/net/ethernet/mediatek/mtk_sgmii.c | 13 ++++++++++++-
  12  1 file changed, 12 insertions(+), 1 deletion(-)
  13
  14 --- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
  15 +++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
  16 @@ -70,16 +70,27 @@ static int mtk_pcs_config(struct phylink
  17  {
  18         struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
  19         unsigned int rgc3;
  20 +       int advertise;
  21 +       bool changed;
  22
  23         if (interface == PHY_INTERFACE_MODE_2500BASEX)
  24                 rgc3 = RG_PHY_SPEED_3_125G;
  25         else
  26                 rgc3 = 0;
  27
  28 +       advertise = phylink_mii_c22_pcs_encode_advertisement(interface,
  29 +                                                            advertising);
  30 +       if (advertise < 0)
  31 +               return advertise;
  32 +
  33         /* Configure the underlying interface speed */
  34         regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
  35                            RG_PHY_SPEED_3_125G, rgc3);
  36
  37 +       /* Update the advertisement, noting whether it has changed */
  38 +       regmap_update_bits_check(mpcs->regmap, SGMSYS_PCS_ADVERTISE,
  39 +                                SGMII_ADVERTISE, advertise, &changed);
  40 +
  41         /* Setup SGMIISYS with the determined property */
  42         if (interface != PHY_INTERFACE_MODE_SGMII)
  43                 mtk_pcs_setup_mode_force(mpcs, interface);
  44 @@ -90,7 +101,7 @@ static int mtk_pcs_config(struct phylink
  45         regmap_update_bits(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL,
  46                            SGMII_PHYA_PWD, 0);
  47
  48 -       return 0;
  49 +       return changed;
  50  }
  51
  52  static void mtk_pcs_restart_an(struct phylink_pcs *pcs)