kernel: bump 5.10 to 5.10.122
[openwrt/openwrt.git] / target / linux / generic / backport-5.10 / 610-v5.13-31-net-ethernet-mtk_eth_soc-fix-parsing-packets-in-GDM.patch
1 From: Felix Fietkau <nbd@nbd.name>
2 Date: Wed, 24 Mar 2021 02:30:52 +0100
3 Subject: [PATCH] net: ethernet: mtk_eth_soc: fix parsing packets in GDM
4
5 When using DSA, set the special tag in GDM ingress control to allow the MAC
6 to parse packets properly earlier. This affects rx DMA source port reporting.
7
8 Signed-off-by: Felix Fietkau <nbd@nbd.name>
9 Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
10 ---
11
12 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
13 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
14 @@ -19,6 +19,7 @@
15 #include <linux/interrupt.h>
16 #include <linux/pinctrl/devinfo.h>
17 #include <linux/phylink.h>
18 +#include <net/dsa.h>
19
20 #include "mtk_eth_soc.h"
21
22 @@ -1285,13 +1286,12 @@ static int mtk_poll_rx(struct napi_struc
23 break;
24
25 /* find out which mac the packet come from. values start at 1 */
26 - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) {
27 + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) ||
28 + (trxd.rxd4 & RX_DMA_SPECIAL_TAG))
29 mac = 0;
30 - } else {
31 - mac = (trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
32 - RX_DMA_FPORT_MASK;
33 - mac--;
34 - }
35 + else
36 + mac = ((trxd.rxd4 >> RX_DMA_FPORT_SHIFT) &
37 + RX_DMA_FPORT_MASK) - 1;
38
39 if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT ||
40 !eth->netdev[mac]))
41 @@ -2257,6 +2257,9 @@ static void mtk_gdm_config(struct mtk_et
42
43 val |= config;
44
45 + if (!i && eth->netdev[0] && netdev_uses_dsa(eth->netdev[0]))
46 + val |= MTK_GDMA_SPECIAL_TAG;
47 +
48 mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
49 }
50 /* Reset and enable PSE */
51 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
52 +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
53 @@ -81,6 +81,7 @@
54
55 /* GDM Exgress Control Register */
56 #define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000))
57 +#define MTK_GDMA_SPECIAL_TAG BIT(24)
58 #define MTK_GDMA_ICS_EN BIT(22)
59 #define MTK_GDMA_TCS_EN BIT(21)
60 #define MTK_GDMA_UCS_EN BIT(20)
61 @@ -318,6 +319,7 @@
62 #define RX_DMA_L4_VALID_PDMA BIT(30) /* when PDMA is used */
63 #define RX_DMA_FPORT_SHIFT 19
64 #define RX_DMA_FPORT_MASK 0x7
65 +#define RX_DMA_SPECIAL_TAG BIT(22)
66
67 /* PHY Indirect Access Control registers */
68 #define MTK_PHY_IAC 0x10004