target/linux/gemini/patches-4.19/0002-pinctrl-gemini-Fix-up-TVC-clock-group.patch

   1 From ce81398dccb984855de606b75db25eddecdaa9e5 Mon Sep 17 00:00:00 2001
   2 From: Linus Walleij <linus.walleij@linaro.org>
   3 Date: Wed, 10 Oct 2018 20:25:39 +0200
   4 Subject: [PATCH 02/18] pinctrl: gemini: Fix up TVC clock group
   5
   6 The previous fix made the TVC clock get muxed in on the
   7 D-Link DIR-685 instead of giving nagging warnings of this
   8 not working. Not good. We didn't want that, as it breaks
   9 video.
  10
  11 Create a specific group for the TVC CLK, and break out
  12 a specific GPIO group for it on the SL3516 so we can use
  13 that line as GPIO if we don't need the TVC CLK.
  14
  15 Fixes: d17f477c5bc6 ("pinctrl: gemini: Mask and set properly")
  16 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  17 ---
  18  drivers/pinctrl/pinctrl-gemini.c | 44 ++++++++++++++++++++++++++------
  19  1 file changed, 36 insertions(+), 8 deletions(-)
  20
  21 diff --git a/drivers/pinctrl/pinctrl-gemini.c b/drivers/pinctrl/pinctrl-gemini.c
  22 index 1e484a36ff07..3535f9841861 100644
  23 --- a/drivers/pinctrl/pinctrl-gemini.c
  24 +++ b/drivers/pinctrl/pinctrl-gemini.c
  25 @@ -591,13 +591,16 @@ static const unsigned int tvc_3512_pins[] = {
  26         319, /* TVC_DATA[1] */
  27         301, /* TVC_DATA[2] */
  28         283, /* TVC_DATA[3] */
  29 -       265, /* TVC_CLK */
  30         320, /* TVC_DATA[4] */
  31         302, /* TVC_DATA[5] */
  32         284, /* TVC_DATA[6] */
  33         266, /* TVC_DATA[7] */
  34  };
  35
  36 +static const unsigned int tvc_clk_3512_pins[] = {
  37 +       265, /* TVC_CLK */
  38 +};
  39 +
  40  /* NAND flash pins */
  41  static const unsigned int nflash_3512_pins[] = {
  42         199, 200, 201, 202, 216, 217, 218, 219, 220, 234, 235, 236, 237, 252,
  43 @@ -629,7 +632,7 @@ static const unsigned int pflash_3512_pins_extended[] = {
  44  /* Serial flash pins CE0, CE1, DI, DO, CK */
  45  static const unsigned int sflash_3512_pins[] = { 230, 231, 232, 233, 211 };
  46
  47 -/* The GPIO0A (0) pin overlap with TVC and extended parallel flash */
  48 +/* The GPIO0A (0) pin overlap with TVC CLK and extended parallel flash */
  49  static const unsigned int gpio0a_3512_pins[] = { 265 };
  50
  51  /* The GPIO0B (1-4) pins overlap with TVC and ICE */
  52 @@ -823,7 +826,13 @@ static const struct gemini_pin_group gemini_3512_pin_groups[] = {
  53                 .num_pins = ARRAY_SIZE(tvc_3512_pins),
  54                 /* Conflict with character LCD and ICE */
  55                 .mask = LCD_PADS_ENABLE,
  56 -               .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE,
  57 +               .value = TVC_PADS_ENABLE,
  58 +       },
  59 +       {
  60 +               .name = "tvcclkgrp",
  61 +               .pins = tvc_clk_3512_pins,
  62 +               .num_pins = ARRAY_SIZE(tvc_clk_3512_pins),
  63 +               .value = TVC_CLK_PAD_ENABLE,
  64         },
  65         /*
  66          * The construction is done such that it is possible to use a serial
  67 @@ -860,8 +869,8 @@ static const struct gemini_pin_group gemini_3512_pin_groups[] = {
  68                 .name = "gpio0agrp",
  69                 .pins = gpio0a_3512_pins,
  70                 .num_pins = ARRAY_SIZE(gpio0a_3512_pins),
  71 -               /* Conflict with TVC */
  72 -               .mask = TVC_PADS_ENABLE,
  73 +               /* Conflict with TVC CLK */
  74 +               .mask = TVC_CLK_PAD_ENABLE,
  75         },
  76         {
  77                 .name = "gpio0bgrp",
  78 @@ -1531,13 +1540,16 @@ static const unsigned int tvc_3516_pins[] = {
  79         311, /* TVC_DATA[1] */
  80         394, /* TVC_DATA[2] */
  81         374, /* TVC_DATA[3] */
  82 -       333, /* TVC_CLK */
  83         354, /* TVC_DATA[4] */
  84         395, /* TVC_DATA[5] */
  85         312, /* TVC_DATA[6] */
  86         334, /* TVC_DATA[7] */
  87  };
  88
  89 +static const unsigned int tvc_clk_3516_pins[] = {
  90 +       333, /* TVC_CLK */
  91 +};
  92 +
  93  /* NAND flash pins */
  94  static const unsigned int nflash_3516_pins[] = {
  95         243, 260, 261, 224, 280, 262, 281, 264, 300, 263, 282, 301, 320, 283,
  96 @@ -1570,7 +1582,7 @@ static const unsigned int pflash_3516_pins_extended[] = {
  97  static const unsigned int sflash_3516_pins[] = { 296, 338, 295, 359, 339 };
  98
  99  /* The GPIO0A (0-4) pins overlap with TVC and extended parallel flash */
 100 -static const unsigned int gpio0a_3516_pins[] = { 333, 354, 395, 312, 334 };
 101 +static const unsigned int gpio0a_3516_pins[] = { 354, 395, 312, 334 };
 102
 103  /* The GPIO0B (5-7) pins overlap with ICE */
 104  static const unsigned int gpio0b_3516_pins[] = { 375, 396, 376 };
 105 @@ -1602,6 +1614,9 @@ static const unsigned int gpio0j_3516_pins[] = { 359, 339 };
 106  /* The GPIO0K (30,31) pins overlap with NAND flash */
 107  static const unsigned int gpio0k_3516_pins[] = { 275, 298 };
 108
 109 +/* The GPIO0L (0) pins overlap with TVC_CLK */
 110 +static const unsigned int gpio0l_3516_pins[] = { 333 };
 111 +
 112  /* The GPIO1A (0-4) pins that overlap with IDE and parallel flash */
 113  static const unsigned int gpio1a_3516_pins[] = { 221, 200, 222, 201, 220 };
 114
 115 @@ -1761,7 +1776,13 @@ static const struct gemini_pin_group gemini_3516_pin_groups[] = {
 116                 .num_pins = ARRAY_SIZE(tvc_3516_pins),
 117                 /* Conflict with character LCD */
 118                 .mask = LCD_PADS_ENABLE,
 119 -               .value = TVC_PADS_ENABLE | TVC_CLK_PAD_ENABLE,
 120 +               .value = TVC_PADS_ENABLE,
 121 +       },
 122 +       {
 123 +               .name = "tvcclkgrp",
 124 +               .pins = tvc_clk_3516_pins,
 125 +               .num_pins = ARRAY_SIZE(tvc_clk_3516_pins),
 126 +               .value = TVC_CLK_PAD_ENABLE,
 127         },
 128         /*
 129          * The construction is done such that it is possible to use a serial
 130 @@ -1872,6 +1893,13 @@ static const struct gemini_pin_group gemini_3516_pin_groups[] = {
 131                 /* Conflict with parallel and NAND flash */
 132                 .value = PFLASH_PADS_DISABLE | NAND_PADS_DISABLE,
 133         },
 134 +       {
 135 +               .name = "gpio0lgrp",
 136 +               .pins = gpio0l_3516_pins,
 137 +               .num_pins = ARRAY_SIZE(gpio0l_3516_pins),
 138 +               /* Conflict with TVE CLK */
 139 +               .mask = TVC_CLK_PAD_ENABLE,
 140 +       },
 141         {
 142                 .name = "gpio1agrp",
 143                 .pins = gpio1a_3516_pins,
 144 --
 145 2.19.2
 146