dc11b768257daba263fb754bd8e9489ac63748ea
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.4 / 0167-BCM270X_DT-Add-Pi3-support.patch
1 From 6aa2c847f76f21c830544e8c79f9030a170ef475 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.org>
3 Date: Thu, 21 Jan 2016 17:57:49 +0000
4 Subject: [PATCH 167/170] BCM270X_DT: Add Pi3 support
5
6 ---
7 arch/arm/boot/dts/Makefile | 1 +
8 arch/arm/boot/dts/bcm2710-rpi-3-b.dts | 174 ++++++++++++++++++++++++++++++++++
9 arch/arm/boot/dts/bcm2710.dtsi | 102 ++++++++++++++++++++
10 3 files changed, 277 insertions(+)
11 create mode 100644 arch/arm/boot/dts/bcm2710-rpi-3-b.dts
12 create mode 100644 arch/arm/boot/dts/bcm2710.dtsi
13
14 --- a/arch/arm/boot/dts/Makefile
15 +++ b/arch/arm/boot/dts/Makefile
16 @@ -5,6 +5,7 @@ dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rp
17 dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rpi-cm.dtb
18 dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-cm.dtb
19 dtb-$(CONFIG_ARCH_BCM2709) += bcm2709-rpi-2-b.dtb
20 +dtb-$(CONFIG_ARCH_BCM2709) += bcm2710-rpi-3-b.dtb
21
22 # Raspberry Pi
23 ifeq ($(CONFIG_ARCH_BCM2708),y)
24 --- /dev/null
25 +++ b/arch/arm/boot/dts/bcm2710-rpi-3-b.dts
26 @@ -0,0 +1,174 @@
27 +/dts-v1/;
28 +
29 +#include "bcm2710.dtsi"
30 +
31 +/ {
32 + compatible = "brcm,bcm2710","brcm,bcm2709";
33 + model = "Raspberry Pi 3 Model B";
34 +};
35 +
36 +&gpio {
37 + sdhost_pins: sdhost_pins {
38 + brcm,pins = <48 49 50 51 52 53>;
39 + brcm,function = <4>; /* alt0 */
40 + };
41 +
42 + spi0_pins: spi0_pins {
43 + brcm,pins = <9 10 11>;
44 + brcm,function = <4>; /* alt0 */
45 + };
46 +
47 + spi0_cs_pins: spi0_cs_pins {
48 + brcm,pins = <8 7>;
49 + brcm,function = <1>; /* output */
50 + };
51 +
52 + i2c0_pins: i2c0 {
53 + brcm,pins = <0 1>;
54 + brcm,function = <4>;
55 + };
56 +
57 + i2c1_pins: i2c1 {
58 + brcm,pins = <2 3>;
59 + brcm,function = <4>;
60 + };
61 +
62 + i2s_pins: i2s {
63 + brcm,pins = <18 19 20 21>;
64 + brcm,function = <4>; /* alt0 */
65 + };
66 +
67 + sdio_pins: sdio_pins {
68 + brcm,pins = <34 35 36 37 38 39>;
69 + brcm,function = <7>; // alt3 = SD1
70 + brcm,pull = <0 2 2 2 2 2>;
71 + };
72 +
73 + bt_pins: bt_pins {
74 + brcm,pins = <28 29 30 31 14 15 43>;
75 + brcm,function = <6 6 6 6 2 2 4>;
76 + // alt2:PCM alt5:UART1 alt0:GPCLK2
77 + brcm,pull = <0 0 0 0 0 2 0>;
78 + };
79 +
80 + uart1_pins: uart1_pins {
81 + brcm,pins = <32 33>;
82 + brcm,function = <7>; /* alt3=UART0 */
83 + brcm,pull = <0>;
84 + };
85 +};
86 +
87 +&sdhost {
88 + pinctrl-names = "default";
89 + pinctrl-0 = <&sdhost_pins>;
90 + bus-width = <4>;
91 + status = "okay";
92 +};
93 +
94 +&mmc {
95 + pinctrl-names = "default";
96 + pinctrl-0 = <&sdio_pins>;
97 + non-removable;
98 + bus-width = <4>;
99 + status = "okay";
100 +};
101 +
102 +&fb {
103 + status = "okay";
104 +};
105 +
106 +&uart0 {
107 + status = "okay";
108 +};
109 +
110 +&uart1 {
111 + pinctrl-names = "default";
112 + pinctrl-0 = <&uart1_pins &bt_pins>;
113 + status = "okay";
114 +};
115 +
116 +&spi0 {
117 + pinctrl-names = "default";
118 + pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
119 + cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
120 +
121 + spidev@0{
122 + compatible = "spidev";
123 + reg = <0>; /* CE0 */
124 + #address-cells = <1>;
125 + #size-cells = <0>;
126 + spi-max-frequency = <500000>;
127 + };
128 +
129 + spidev@1{
130 + compatible = "spidev";
131 + reg = <1>; /* CE1 */
132 + #address-cells = <1>;
133 + #size-cells = <0>;
134 + spi-max-frequency = <500000>;
135 + };
136 +};
137 +
138 +&i2c0 {
139 + pinctrl-names = "default";
140 + pinctrl-0 = <&i2c0_pins>;
141 + clock-frequency = <100000>;
142 +};
143 +
144 +&i2c1 {
145 + pinctrl-names = "default";
146 + pinctrl-0 = <&i2c1_pins>;
147 + clock-frequency = <100000>;
148 +};
149 +
150 +&i2c2 {
151 + clock-frequency = <100000>;
152 +};
153 +
154 +&i2s {
155 + #sound-dai-cells = <0>;
156 + pinctrl-names = "default";
157 + pinctrl-0 = <&i2s_pins>;
158 +};
159 +
160 +&random {
161 + status = "okay";
162 +};
163 +
164 +&leds {
165 + act_led: act {
166 + label = "led0";
167 + linux,default-trigger = "mmc0";
168 + gpios = <&gpio 47 0>;
169 + };
170 +};
171 +
172 +/ {
173 + chosen {
174 + bootargs = "8250.nr_uarts=1";
175 + };
176 +};
177 +
178 +/ {
179 + __overrides__ {
180 + uart0 = <&uart0>,"status";
181 + uart0_clkrate = <&clk_uart0>,"clock-frequency:0";
182 + i2s = <&i2s>,"status";
183 + spi = <&spi0>,"status";
184 + i2c0 = <&i2c0>,"status";
185 + i2c1 = <&i2c1>,"status";
186 + i2c2_iknowwhatimdoing = <&i2c2>,"status";
187 + i2c0_baudrate = <&i2c0>,"clock-frequency:0";
188 + i2c1_baudrate = <&i2c1>,"clock-frequency:0";
189 + i2c2_baudrate = <&i2c2>,"clock-frequency:0";
190 + core_freq = <&clk_core>,"clock-frequency:0";
191 +
192 + act_led_gpio = <&act_led>,"gpios:4";
193 + act_led_activelow = <&act_led>,"gpios:8";
194 + act_led_trigger = <&act_led>,"linux,default-trigger";
195 +
196 + audio = <&audio>,"status";
197 + watchdog = <&watchdog>,"status";
198 + random = <&random>,"status";
199 + };
200 +};
201 --- /dev/null
202 +++ b/arch/arm/boot/dts/bcm2710.dtsi
203 @@ -0,0 +1,102 @@
204 +#include "bcm2708_common.dtsi"
205 +
206 +/ {
207 + compatible = "brcm,bcm2710","brcm,bcm2709";
208 + model = "BCM2710";
209 +
210 + chosen {
211 + /* No padding required - the boot loader can do that. */
212 + bootargs = "";
213 + };
214 +
215 + soc {
216 + ranges = <0x7e000000 0x3f000000 0x01000000>,
217 + <0x40000000 0x40000000 0x00040000>;
218 +
219 + local_intc: local_intc {
220 + compatible = "brcm,bcm2836-l1-intc";
221 + reg = <0x40000000 0x100>;
222 + interrupt-controller;
223 + #interrupt-cells = <1>;
224 + interrupt-parent = <&local_intc>;
225 + };
226 +
227 + arm-pmu {
228 + compatible = "arm,cortex-a7-pmu";
229 + interrupt-parent = <&local_intc>;
230 + interrupts = <9>;
231 + };
232 +
233 + gpiomem {
234 + compatible = "brcm,bcm2835-gpiomem";
235 + reg = <0x7e200000 0x1000>;
236 + status = "okay";
237 + };
238 +
239 + timer {
240 + compatible = "arm,armv7-timer";
241 + clock-frequency = <19200000>;
242 + interrupt-parent = <&local_intc>;
243 + interrupts = <0>, // PHYS_SECURE_PPI
244 + <1>, // PHYS_NONSECURE_PPI
245 + <3>, // VIRT_PPI
246 + <2>; // HYP_PPI
247 + always-on;
248 + };
249 +
250 + syscon@40000000 {
251 + compatible = "brcm,bcm2836-arm-local", "syscon";
252 + reg = <0x40000000 0x100>;
253 + };
254 + };
255 +
256 + cpus: cpus {
257 + #address-cells = <1>;
258 + #size-cells = <0>;
259 +
260 + v7_cpu0: cpu@0 {
261 + device_type = "cpu";
262 + compatible = "arm,cortex-a7";
263 + reg = <0x000>;
264 + clock-frequency = <800000000>;
265 + };
266 +
267 + v7_cpu1: cpu@1 {
268 + device_type = "cpu";
269 + compatible = "arm,cortex-a7";
270 + reg = <0x001>;
271 + clock-frequency = <800000000>;
272 + };
273 +
274 + v7_cpu2: cpu@2 {
275 + device_type = "cpu";
276 + compatible = "arm,cortex-a7";
277 + reg = <0x002>;
278 + clock-frequency = <800000000>;
279 + };
280 +
281 + v7_cpu3: cpu@3 {
282 + device_type = "cpu";
283 + compatible = "arm,cortex-a7";
284 + reg = <0x003>;
285 + clock-frequency = <800000000>;
286 + };
287 + };
288 +
289 + __overrides__ {
290 + arm_freq = <&v7_cpu0>, "clock-frequency:0",
291 + <&v7_cpu1>, "clock-frequency:0",
292 + <&v7_cpu2>, "clock-frequency:0",
293 + <&v7_cpu3>, "clock-frequency:0";
294 + };
295 +};
296 +
297 +&watchdog {
298 + status = "okay";
299 +};
300 +
301 +&intc {
302 + compatible = "brcm,bcm2836-armctrl-ic";
303 + interrupt-parent = <&local_intc>;
304 + interrupts = <8>;
305 +};