brcm2708: add kernel 4.14 support
[openwrt/openwrt.git] / target / linux / brcm2708 / patches-4.14 / 950-0146-Add-overlay-for-mcp3202-12-bit-ADC.patch
1 From ab6b50d10b73ed3150dd80633131b7d56c1c63df Mon Sep 17 00:00:00 2001
2 From: penfold42 <penfold42@users.noreply.github.com>
3 Date: Tue, 2 Jan 2018 00:15:19 +1100
4 Subject: [PATCH 146/454] Add overlay for mcp3202 12 bit ADC
5
6 ---
7 arch/arm/boot/dts/overlays/Makefile | 1 +
8 arch/arm/boot/dts/overlays/README | 9 +
9 .../arm/boot/dts/overlays/mcp3202-overlay.dts | 205 ++++++++++++++++++
10 3 files changed, 215 insertions(+)
11 create mode 100755 arch/arm/boot/dts/overlays/mcp3202-overlay.dts
12
13 --- a/arch/arm/boot/dts/overlays/Makefile
14 +++ b/arch/arm/boot/dts/overlays/Makefile
15 @@ -61,6 +61,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
16 mcp2515-can0.dtbo \
17 mcp2515-can1.dtbo \
18 mcp3008.dtbo \
19 + mcp3202.dtbo \
20 media-center.dtbo \
21 midi-uart0.dtbo \
22 midi-uart1.dtbo \
23 --- a/arch/arm/boot/dts/overlays/README
24 +++ b/arch/arm/boot/dts/overlays/README
25 @@ -994,6 +994,15 @@ Params: spi<n>-<m>-present boolean,
26 spi<n>-<m>-speed integer, set the spi bus speed for this device
27
28
29 +Name: mcp3202
30 +Info: Configures MCP3202 A/D converters
31 + For devices on spi1 or spi2, the interfaces should be enabled
32 + with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
33 +Load: dtoverlay=mcp3202,<param>[=<val>]
34 +Params: spi<n>-<m>-present boolean, configure device at spi<n>, cs<m>
35 + spi<n>-<m>-speed integer, set the spi bus speed for this device
36 +
37 +
38 Name: media-center
39 Info: Media Center HAT - 2.83" Touch Display + extras by Pi Supply
40 Load: dtoverlay=media-center,<param>=<val>
41 --- /dev/null
42 +++ b/arch/arm/boot/dts/overlays/mcp3202-overlay.dts
43 @@ -0,0 +1,205 @@
44 +/*
45 + * Device tree overlay for Microchip mcp3202 12-Bit A/D Converters
46 + */
47 +
48 +/dts-v1/;
49 +/plugin/;
50 +
51 +/ {
52 + compatible = "brcm,bcm2835", "brcm,bcm2708", "brcm,bcm2709";
53 +
54 + fragment@0 {
55 + target = <&spidev0>;
56 + __dormant__ {
57 + status = "disabled";
58 + };
59 + };
60 +
61 + fragment@1 {
62 + target = <&spidev1>;
63 + __dormant__ {
64 + status = "disabled";
65 + };
66 + };
67 +
68 + fragment@2 {
69 + target-path = "spi1/spidev@0";
70 + __dormant__ {
71 + status = "disabled";
72 + };
73 + };
74 +
75 + fragment@3 {
76 + target-path = "spi1/spidev@1";
77 + __dormant__ {
78 + status = "disabled";
79 + };
80 + };
81 +
82 + fragment@4 {
83 + target-path = "spi1/spidev@2";
84 + __dormant__ {
85 + status = "disabled";
86 + };
87 + };
88 +
89 + fragment@5 {
90 + target-path = "spi2/spidev@0";
91 + __dormant__ {
92 + status = "disabled";
93 + };
94 + };
95 +
96 + fragment@6 {
97 + target-path = "spi2/spidev@1";
98 + __dormant__ {
99 + status = "disabled";
100 + };
101 + };
102 +
103 + fragment@7 {
104 + target-path = "spi2/spidev@2";
105 + __dormant__ {
106 + status = "disabled";
107 + };
108 + };
109 +
110 + fragment@8 {
111 + target = <&spi0>;
112 + __dormant__ {
113 + status = "okay";
114 + #address-cells = <1>;
115 + #size-cells = <0>;
116 +
117 + mcp3202_00: mcp3202@0 {
118 + compatible = "mcp3202";
119 + reg = <0>;
120 + spi-max-frequency = <1600000>;
121 + };
122 + };
123 + };
124 +
125 + fragment@9 {
126 + target = <&spi0>;
127 + __dormant__ {
128 + status = "okay";
129 + #address-cells = <1>;
130 + #size-cells = <0>;
131 +
132 + mcp3202_01: mcp3202@1 {
133 + compatible = "mcp3202";
134 + reg = <1>;
135 + spi-max-frequency = <1600000>;
136 + };
137 + };
138 + };
139 +
140 + fragment@10 {
141 + target = <&spi1>;
142 + __dormant__ {
143 + status = "okay";
144 + #address-cells = <1>;
145 + #size-cells = <0>;
146 +
147 + mcp3202_10: mcp3202@0 {
148 + compatible = "mcp3202";
149 + reg = <0>;
150 + spi-max-frequency = <1600000>;
151 + };
152 + };
153 + };
154 +
155 + fragment@11 {
156 + target = <&spi1>;
157 + __dormant__ {
158 + status = "okay";
159 + #address-cells = <1>;
160 + #size-cells = <0>;
161 +
162 + mcp3202_11: mcp3202@1 {
163 + compatible = "mcp3202";
164 + reg = <1>;
165 + spi-max-frequency = <1600000>;
166 + };
167 + };
168 + };
169 +
170 + fragment@12 {
171 + target = <&spi1>;
172 + __dormant__ {
173 + status = "okay";
174 + #address-cells = <1>;
175 + #size-cells = <0>;
176 +
177 + mcp3202_12: mcp3202@2 {
178 + compatible = "mcp3202";
179 + reg = <2>;
180 + spi-max-frequency = <1600000>;
181 + };
182 + };
183 + };
184 +
185 + fragment@13 {
186 + target = <&spi2>;
187 + __dormant__ {
188 + status = "okay";
189 + #address-cells = <1>;
190 + #size-cells = <0>;
191 +
192 + mcp3202_20: mcp3202@0 {
193 + compatible = "mcp3202";
194 + reg = <0>;
195 + spi-max-frequency = <1600000>;
196 + };
197 + };
198 + };
199 +
200 + fragment@14 {
201 + target = <&spi2>;
202 + __dormant__ {
203 + status = "okay";
204 + #address-cells = <1>;
205 + #size-cells = <0>;
206 +
207 + mcp3202_21: mcp3202@1 {
208 + compatible = "mcp3202";
209 + reg = <1>;
210 + spi-max-frequency = <1600000>;
211 + };
212 + };
213 + };
214 +
215 + fragment@15 {
216 + target = <&spi2>;
217 + __dormant__ {
218 + status = "okay";
219 + #address-cells = <1>;
220 + #size-cells = <0>;
221 +
222 + mcp3202_22: mcp3202@2 {
223 + compatible = "mcp3202";
224 + reg = <2>;
225 + spi-max-frequency = <1600000>;
226 + };
227 + };
228 + };
229 +
230 + __overrides__ {
231 + spi0-0-present = <0>, "+0+8";
232 + spi0-1-present = <0>, "+1+9";
233 + spi1-0-present = <0>, "+2+10";
234 + spi1-1-present = <0>, "+3+11";
235 + spi1-2-present = <0>, "+4+12";
236 + spi2-0-present = <0>, "+5+13";
237 + spi2-1-present = <0>, "+6+14";
238 + spi2-2-present = <0>, "+7+15";
239 + spi0-0-speed = <&mcp3202_00>, "spi-max-frequency:0";
240 + spi0-1-speed = <&mcp3202_01>, "spi-max-frequency:0";
241 + spi1-0-speed = <&mcp3202_10>, "spi-max-frequency:0";
242 + spi1-1-speed = <&mcp3202_11>, "spi-max-frequency:0";
243 + spi1-2-speed = <&mcp3202_12>, "spi-max-frequency:0";
244 + spi2-0-speed = <&mcp3202_20>, "spi-max-frequency:0";
245 + spi2-1-speed = <&mcp3202_21>, "spi-max-frequency:0";
246 + spi2-2-speed = <&mcp3202_22>, "spi-max-frequency:0";
247 + };
248 +};