target/linux/bcm27xx/patches-6.1/950-0951-drm-vc4-Move-the-buffer-offset-out-of-the-vc4_plane_.patch

   1 From 11cf37e741b439b26fe932750bde841a16a96828 Mon Sep 17 00:00:00 2001
   2 From: Dave Stevenson <dave.stevenson@raspberrypi.com>
   3 Date: Mon, 25 Sep 2023 16:57:07 +0100
   4 Subject: [PATCH] drm/vc4: Move the buffer offset out of the vc4_plane_state
   5
   6 The offset fields in vc4_plane_state are described as being
   7 the offset for each buffer in the bo, however it is used to
   8 store the complete DMA address that is then written into the
   9 register.
  10
  11 The DMA address including the fb ofset  can be retrieved
  12 using drm_fb_dma_get_gem_addr, and the offset adjustment due to
  13 clipping is local to vc4_plane_mode_set.
  14 Drop the offset field from the state, and compute the complete
  15 DMA address in vc4_plane_mode_set.
  16
  17 Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
  18 ---
  19  drivers/gpu/drm/vc4/vc4_drv.h   |  5 ----
  20  drivers/gpu/drm/vc4/vc4_plane.c | 51 +++++++++++++--------------------
  21  2 files changed, 20 insertions(+), 36 deletions(-)
  22
  23 --- a/drivers/gpu/drm/vc4/vc4_drv.h
  24 +++ b/drivers/gpu/drm/vc4/vc4_drv.h
  25 @@ -451,11 +451,6 @@ struct vc4_plane_state {
  26         bool is_unity;
  27         bool is_yuv;
  28
  29 -       /* Offset to start scanning out from the start of the plane's
  30 -        * BO.
  31 -        */
  32 -       u32 offsets[3];
  33 -
  34         /* Our allocation in LBM for temporary storage during scaling. */
  35         struct drm_mm_node lbm;
  36
  37 --- a/drivers/gpu/drm/vc4/vc4_plane.c
  38 +++ b/drivers/gpu/drm/vc4/vc4_plane.c
  39 @@ -450,12 +450,11 @@ static int vc4_plane_setup_clipping_and_
  40  {
  41         struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
  42         struct drm_framebuffer *fb = state->fb;
  43 -       struct drm_gem_dma_object *bo;
  44         int num_planes = fb->format->num_planes;
  45         struct drm_crtc_state *crtc_state;
  46         u32 h_subsample = fb->format->hsub;
  47         u32 v_subsample = fb->format->vsub;
  48 -       int i, ret;
  49 +       int ret;
  50
  51         crtc_state = drm_atomic_get_existing_crtc_state(state->state,
  52                                                         state->crtc);
  53 @@ -469,11 +468,6 @@ static int vc4_plane_setup_clipping_and_
  54         if (ret)
  55                 return ret;
  56
  57 -       for (i = 0; i < num_planes; i++) {
  58 -               bo = drm_fb_dma_get_gem_obj(fb, i);
  59 -               vc4_state->offsets[i] = bo->dma_addr + fb->offsets[i];
  60 -       }
  61 -
  62         vc4_state->src_x = state->src.x1;
  63         vc4_state->src_y = state->src.y1;
  64         vc4_state->src_w[0] = state->src.x2 - vc4_state->src_x;
  65 @@ -896,6 +890,7 @@ static int vc4_plane_mode_set(struct drm
  66         u32 width, height;
  67         u32 hvs_format = format->hvs;
  68         unsigned int rotation;
  69 +       u32 offsets[3] = { 0 };
  70         int ret, i;
  71
  72         if (vc4_state->dlist_initialized)
  73 @@ -943,13 +938,8 @@ static int vc4_plane_mode_set(struct drm
  74                  * out.
  75                  */
  76                 for (i = 0; i < num_planes; i++) {
  77 -                       vc4_state->offsets[i] += src_y /
  78 -                                                (i ? v_subsample : 1) *
  79 -                                                fb->pitches[i];
  80 -
  81 -                       vc4_state->offsets[i] += src_x /
  82 -                                                (i ? h_subsample : 1) *
  83 -                                                fb->format->cpp[i];
  84 +                       offsets[i] += src_y / (i ? v_subsample : 1) * fb->pitches[i];
  85 +                       offsets[i] += src_x / (i ? h_subsample : 1) * fb->format->cpp[i];
  86                 }
  87
  88                 break;
  89 @@ -1004,19 +994,18 @@ static int vc4_plane_mode_set(struct drm
  90                            VC4_SET_FIELD(y_off, SCALER_PITCH0_TILE_Y_OFFSET) |
  91                            VC4_SET_FIELD(tiles_l, SCALER_PITCH0_TILE_WIDTH_L) |
  92                            VC4_SET_FIELD(tiles_r, SCALER_PITCH0_TILE_WIDTH_R));
  93 -               vc4_state->offsets[0] += tiles_t * (tiles_w << tile_size_shift);
  94 -               vc4_state->offsets[0] += subtile_y << 8;
  95 -               vc4_state->offsets[0] += utile_y << 4;
  96 +               offsets[0] += tiles_t * (tiles_w << tile_size_shift);
  97 +               offsets[0] += subtile_y << 8;
  98 +               offsets[0] += utile_y << 4;
  99
 100                 /* Rows of tiles alternate left-to-right and right-to-left. */
 101                 if (tiles_t & 1) {
 102                         pitch0 |= SCALER_PITCH0_TILE_INITIAL_LINE_DIR;
 103 -                       vc4_state->offsets[0] += (tiles_w - tiles_l) <<
 104 -                                                tile_size_shift;
 105 -                       vc4_state->offsets[0] -= (1 + !tile_y) << 10;
 106 +                       offsets[0] += (tiles_w - tiles_l) << tile_size_shift;
 107 +                       offsets[0] -= (1 + !tile_y) << 10;
 108                 } else {
 109 -                       vc4_state->offsets[0] += tiles_l << tile_size_shift;
 110 -                       vc4_state->offsets[0] += tile_y << 10;
 111 +                       offsets[0] += tiles_l << tile_size_shift;
 112 +                       offsets[0] += tile_y << 10;
 113                 }
 114
 115                 break;
 116 @@ -1105,11 +1094,9 @@ static int vc4_plane_mode_set(struct drm
 117
 118                         tile = src_x / pix_per_tile;
 119
 120 -                       vc4_state->offsets[i] += param * tile_w * tile;
 121 -                       vc4_state->offsets[i] += src_y /
 122 -                                                (i ? v_subsample : 1) *
 123 -                                                tile_w;
 124 -                       vc4_state->offsets[i] += x_off & ~(i ? 1 : 0);
 125 +                       offsets[i] += param * tile_w * tile;
 126 +                       offsets[i] += src_y / (i ? v_subsample : 1) * tile_w;
 127 +                       offsets[i] += x_off & ~(i ? 1 : 0);
 128                 }
 129
 130                 pitch0 = VC4_SET_FIELD(param, SCALER_TILE_HEIGHT);
 131 @@ -1253,8 +1240,12 @@ static int vc4_plane_mode_set(struct drm
 132          * The pointers may be any byte address.
 133          */
 134         vc4_state->ptr0_offset[0] = vc4_state->dlist_count;
 135 -       for (i = 0; i < num_planes; i++)
 136 -               vc4_dlist_write(vc4_state, vc4_state->offsets[i]);
 137 +
 138 +       for (i = 0; i < num_planes; i++) {
 139 +               dma_addr_t paddr = drm_fb_dma_get_gem_addr(fb, state, i);
 140 +
 141 +               vc4_dlist_write(vc4_state, paddr + offsets[i]);
 142 +       }
 143
 144         /* Pointer Context Word 0/1/2: Written by the HVS */
 145         for (i = 0; i < num_planes; i++)
 146 @@ -1518,8 +1509,6 @@ static void vc4_plane_atomic_async_updat
 147                sizeof(vc4_state->y_scaling));
 148         vc4_state->is_unity = new_vc4_state->is_unity;
 149         vc4_state->is_yuv = new_vc4_state->is_yuv;
 150 -       memcpy(vc4_state->offsets, new_vc4_state->offsets,
 151 -              sizeof(vc4_state->offsets));
 152         vc4_state->needs_bg_fill = new_vc4_state->needs_bg_fill;
 153
 154         /* Update the current vc4_state pos0, pos2 and ptr0 dlist entries. */