target/linux/bcm27xx/patches-5.4/950-0946-dt-overlays-Add-PiFace-Digital-Device-Tree-Overlay.patch

   1 From 296cff78df285c99a52760cbcd896abc37820e06 Mon Sep 17 00:00:00 2001
   2 From: Thomas Preston <thomas.preston@codethink.co.uk>
   3 Date: Thu, 13 Aug 2020 01:38:35 +0100
   4 Subject: [PATCH] dt/overlays: Add PiFace Digital Device Tree Overlay
   5
   6 The PiFace Digital is a convenient breakout board for the Microchip
   7 mcp23s17 SPI GPIO port expander.
   8
   9 The first eight GPIOs 0..7 (bank A) are connected to eight output
  10 terminals and LEDs, plus two relays on the first two outputs. These
  11 output loads are active-high.
  12
  13 The next eight GPIOs 8..15 (bank B) are connected to eight input
  14 terminals with four on-board switches connecting them to ground. Inputs
  15 devices are therefore expected to bridge terminals to ground, so the
  16 mcp23s17 pullups are activated for GPIO bank B.
  17
  18 Signed-off-by: Thomas Preston <thomas.preston@codethink.co.uk>
  19 ---
  20  arch/arm/boot/dts/overlays/Makefile           |   1 +
  21  arch/arm/boot/dts/overlays/README             |   8 +
  22  .../dts/overlays/pifacedigital-overlay.dts    | 144 ++++++++++++++++++
  23  3 files changed, 153 insertions(+)
  24  create mode 100644 arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
  25
  26 --- a/arch/arm/boot/dts/overlays/Makefile
  27 +++ b/arch/arm/boot/dts/overlays/Makefile
  28 @@ -121,6 +121,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
  29         papirus.dtbo \
  30         pca953x.dtbo \
  31         pibell.dtbo \
  32 +       pifacedigital.dtbo \
  33         piglow.dtbo \
  34         piscreen.dtbo \
  35         piscreen2r.dtbo \
  36 --- a/arch/arm/boot/dts/overlays/README
  37 +++ b/arch/arm/boot/dts/overlays/README
  38 @@ -1949,6 +1949,14 @@ Params: alsaname                Set the
  39                                  "PiBell")
  40
  41
  42 +Name:   pifacedigital
  43 +Info:   Configures the PiFace Digital mcp23s17 GPIO port expander.
  44 +Load:   dtoverlay=pifacedigital,<param>=<val>
  45 +Params: spi-present-mask        8-bit integer, bitmap indicating MCP23S17 SPI0
  46 +                                CS0 address. PiFace Digital supports addresses
  47 +                                0-3, which can be configured with JP1 and JP2.
  48 +
  49 +
  50  Name:   piglow
  51  Info:   Configures the PiGlow by pimoroni.com
  52  Load:   dtoverlay=piglow
  53 --- /dev/null
  54 +++ b/arch/arm/boot/dts/overlays/pifacedigital-overlay.dts
  55 @@ -0,0 +1,144 @@
  56 +// SPDX-License-Identifier: GPL-2.0-only
  57 +/*
  58 + * PiFace Digital, Device Tree Overlay.
  59 + * Copyright (C) 2020 Thomas Preston <thomas.preston@codethink.co.uk>
  60 + *
  61 + * The PiFace Digital is a convenient breakout board for the Microchip mcp23s17
  62 + * SPI GPIO port expander.
  63 + *
  64 + * The first eight GPIOs 0..7 (bank A) are connected to eight output terminals
  65 + * and LEDs, plus two relays on the first two outputs. These output loads are
  66 + * active-high.
  67 + *
  68 + * The next eight GPIOs 8..15 (bank B) are connected to eight input terminals
  69 + * with four on-board switches connecting them to ground. Inputs devices are
  70 + * therefore expected to bridge terminals to ground, so the mcp23s17 pullups are
  71 + * activated for GPIO bank B.
  72 + *
  73 + * On PiFace Digital, the mcp23s17 is connected to the Raspberry Pi's SPI0 CS0
  74 + * bus. Each SPI bus supports up to eight addressable child devices. The PiFace
  75 + * Digital only supports addresses 0-4, which can be configured by jumpers JP1
  76 + * and JP2.
  77 + *
  78 + * You can tell the driver about these jumper configurations with the
  79 + * spi-present-mask bitmask:
  80 + *
  81 + *     | JP1 | JP2 | dtoverlay line in /boot/config.txt         |
  82 + *     | --- | --- | ------------------------------------------ |
  83 + *     |  0  |  0  | dtoverlay=pifacedigital                    |
  84 + *     |  0  |  0  | dtoverlay=pifacedigital:spi-present-mask=1 |
  85 + *     |  0  |  1  | dtoverlay=pifacedigital:spi-present-mask=2 |
  86 + *     |  1  |  0  | dtoverlay=pifacedigital:spi-present-mask=4 |
  87 + *     |  1  |  1  | dtoverlay=pifacedigital:spi-present-mask=8 |
  88 + *
  89 + * # Example
  90 + * Set the dtoverlay config in /boot/config.txt and power off the Raspberry Pi:
  91 + *
  92 + *     $ grep pifacedigital /boot/config.txt
  93 + *     dtoverlay=pifacedigital
  94 + *     $ sudo systemctl poweroff
  95 + *
  96 + * Attach the PiFace Digital and power on the Raspberry Pi.
  97 + * Then use the libgpiod tools to query the device:
  98 + *
  99 + *     $ sudo apt install gpiod
 100 + *     $ gpiodetect | grep mcp23s17
 101 + *     gpiochip2 [mcp23s17.0] (16 lines)
 102 + *
 103 + * Set GPIO outputs 0, 2 and 5:
 104 + *
 105 + *     $ gpioset gpiochip2 0=1 2=1 5=1
 106 + *
 107 + * Get GPIO status (input GPIO 8..15 are high, because they are active-low):
 108 + *
 109 + *     $ gpioget gpiochip2 {8..15}
 110 + *     1 1 1 1 1 1 1 1
 111 + *
 112 + * And even monitor interrupts:
 113 + *
 114 + *     $ gpiomon gpiochip2 {8..15}
 115 + *     event: FALLING EDGE offset: 11 timestamp: [1597361662.926741667]
 116 + *     event:  RISING EDGE offset: 11 timestamp: [1597361663.062555051]
 117 + *
 118 + */
 119 +
 120 +/dts-v1/;
 121 +/plugin/;
 122 +
 123 +/ {
 124 +       compatible = "brcm,bcm2835";
 125 +
 126 +       /* Disable exposing /dev/spidev0.0 */
 127 +       fragment@0 {
 128 +               target = <&spidev0>;
 129 +               __overlay__ {
 130 +                       status = "disabled";
 131 +               };
 132 +       };
 133 +
 134 +       /* Add the PiFace Digital device node to the spi0.0 device. */
 135 +       fragment@1 {
 136 +               target = <&spi0>;
 137 +               __overlay__ {
 138 +                       status = "okay";
 139 +                       #address-cells = <1>;
 140 +                       #size-cells = <0>;
 141 +
 142 +                       pfdigital: pifacedigital@0 {
 143 +                               compatible = "microchip,mcp23s17";
 144 +                               reg = <0>;
 145 +
 146 +                               /* Set devices present with 8-bit mask. */
 147 +                               microchip,spi-present-mask = <0x01>;
 148 +                               spi-max-frequency = <500000>;
 149 +
 150 +                               gpio-controller;
 151 +                               #gpio-cells = <2>;
 152 +
 153 +                               /* This device can pass through interrupts. */
 154 +                               interrupt-controller;
 155 +                               #interrupt-cells = <2>;
 156 +
 157 +                               /* INTB is connected to GPIO 25.
 158 +                                * 0x8 active-low level-sensitive
 159 +                                */
 160 +                               interrupts = <25 0x8>;
 161 +                               interrupt-parent = <&gpio>;
 162 +
 163 +                               /* Configure pull-ups on bank B GPIOs */
 164 +                               pinctrl-0 = <&pfdigital_irq &pfdigital_pullups>;
 165 +                               pinctrl-names = "default";
 166 +                               pfdigital_pullups: pinmux {
 167 +                                       pins =
 168 +                                               "gpio8",
 169 +                                               "gpio9",
 170 +                                               "gpio10",
 171 +                                               "gpio11",
 172 +                                               "gpio12",
 173 +                                               "gpio13",
 174 +                                               "gpio14",
 175 +                                               "gpio15";
 176 +                                       bias-pull-up;
 177 +                               };
 178 +                       };
 179 +               };
 180 +       };
 181 +
 182 +       /* PiFace Digital mcp23s17 INTB pin is connected to GPIO 25. The INTB
 183 +        * pin is configured active-low (0 on interrupt), so expect to see
 184 +        * FALLING_EDGE when inputs are bridged to ground (switch is pressed).
 185 +        */
 186 +       fragment@3 {
 187 +               target = <&gpio>;
 188 +               __overlay__ {
 189 +                       pfdigital_irq: pifacedigital_irq {
 190 +                               brcm,pins = <25>;
 191 +                               brcm,function = <0>; /* input */
 192 +                       };
 193 +               };
 194 +       };
 195 +
 196 +       __overrides__ {
 197 +               spi-present-mask = <&pfdigital>, "microchip,spi-present-mask:0";
 198 +       };
 199 +};