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bcm27xx: import latest patches from the RPi foundation
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.4 / 950-0867-ARM-dts-Make-bcm2711-dts-more-like-5.7.patch
1 From 0f02c32b2d27fa5f0b21c67fb5518a36b5234f3a Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Tue, 7 Jul 2020 09:01:54 +0100
4 Subject: [PATCH] ARM: dts: Make bcm2711 dts more like 5.7
5
6 The multiple declarations of pixelvalve2 were causing problems for the
7 DT checkers. Aligning the dts files closer to the later kernel versions
8 avoids some repetition and should make maintenance easier.
9
10 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
11 ---
12 arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 142 ++++++++++++-----------
13 arch/arm/boot/dts/bcm2711-rpi-cm4.dts | 69 +----------
14 arch/arm/boot/dts/bcm2711-rpi.dtsi | 150 +++++++++++++++++++++++-
15 arch/arm/boot/dts/bcm2711.dtsi | 157 +++-----------------------
16 4 files changed, 245 insertions(+), 273 deletions(-)
17
18 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
19 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
20 @@ -19,7 +19,9 @@
21 };
22
23 aliases {
24 + emmc2bus = &emmc2bus;
25 ethernet0 = &genet;
26 + pcie0 = &pcie0;
27 };
28
29 leds {
30 @@ -30,6 +32,8 @@
31 pwr {
32 label = "PWR";
33 gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
34 + default-state = "keep";
35 + linux,default-trigger = "default-on";
36 };
37 };
38
39 @@ -70,6 +74,79 @@
40 };
41 };
42
43 +&gpio {
44 + /*
45 + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and
46 + * the official GPU firmware DT blob.
47 + *
48 + * Legend:
49 + * "FOO" = GPIO line named "FOO" on the schematic
50 + * "FOO_N" = GPIO line named "FOO" on schematic, active low
51 + */
52 + gpio-line-names = "ID_SDA",
53 + "ID_SCL",
54 + "SDA1",
55 + "SCL1",
56 + "GPIO_GCLK",
57 + "GPIO5",
58 + "GPIO6",
59 + "SPI_CE1_N",
60 + "SPI_CE0_N",
61 + "SPI_MISO",
62 + "SPI_MOSI",
63 + "SPI_SCLK",
64 + "GPIO12",
65 + "GPIO13",
66 + /* Serial port */
67 + "TXD1",
68 + "RXD1",
69 + "GPIO16",
70 + "GPIO17",
71 + "GPIO18",
72 + "GPIO19",
73 + "GPIO20",
74 + "GPIO21",
75 + "GPIO22",
76 + "GPIO23",
77 + "GPIO24",
78 + "GPIO25",
79 + "GPIO26",
80 + "GPIO27",
81 + "RGMII_MDIO",
82 + "RGMIO_MDC",
83 + /* Used by BT module */
84 + "CTS0",
85 + "RTS0",
86 + "TXD0",
87 + "RXD0",
88 + /* Used by Wifi */
89 + "SD1_CLK",
90 + "SD1_CMD",
91 + "SD1_DATA0",
92 + "SD1_DATA1",
93 + "SD1_DATA2",
94 + "SD1_DATA3",
95 + /* Shared with SPI flash */
96 + "PWM0_MISO",
97 + "PWM1_MOSI",
98 + "STATUS_LED_G_CLK",
99 + "SPIFLASH_CE_N",
100 + "SDA0",
101 + "SCL0",
102 + "RGMII_RXCLK",
103 + "RGMII_RXCTL",
104 + "RGMII_RXD0",
105 + "RGMII_RXD1",
106 + "RGMII_RXD2",
107 + "RGMII_RXD3",
108 + "RGMII_TXCLK",
109 + "RGMII_TXCTL",
110 + "RGMII_TXD0",
111 + "RGMII_TXD1",
112 + "RGMII_TXD2",
113 + "RGMII_TXD3";
114 +};
115 +
116 &pwm1 {
117 pinctrl-names = "default";
118 pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
119 @@ -138,46 +215,6 @@
120 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
121 };
122
123 -&vc4 {
124 - status = "okay";
125 -};
126 -
127 -&pixelvalve0 {
128 - status = "okay";
129 -};
130 -
131 -&pixelvalve1 {
132 - status = "okay";
133 -};
134 -
135 -&pixelvalve2 {
136 - status = "okay";
137 -};
138 -
139 -&pixelvalve3 {
140 - status = "okay";
141 -};
142 -
143 -&pixelvalve4 {
144 - status = "okay";
145 -};
146 -
147 -&hdmi0 {
148 - status = "okay";
149 -};
150 -
151 -&ddc0 {
152 - status = "okay";
153 -};
154 -
155 -&hdmi1 {
156 - status = "okay";
157 -};
158 -
159 -&ddc1 {
160 - status = "okay";
161 -};
162 -
163 // =============================================
164 // Downstream rpi- changes
165
166 @@ -195,8 +232,6 @@
167 #include "bcm283x-rpi-csi1-2lane.dtsi"
168 #include "bcm283x-rpi-i2c0mux_0_44.dtsi"
169
170 -/delete-node/ &emmc2;
171 -
172 / {
173 chosen {
174 bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
175 @@ -213,29 +248,7 @@
176 i2c4 = &i2c4;
177 i2c5 = &i2c5;
178 i2c6 = &i2c6;
179 - /delete-property/ ethernet;
180 /delete-property/ intc;
181 - pcie0 = &pcie0;
182 - emmc2bus = &emmc2bus;
183 - };
184 -
185 - emmc2bus: emmc2bus {
186 - compatible = "simple-bus";
187 - #address-cells = <2>;
188 - #size-cells = <1>;
189 -
190 - ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
191 - dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
192 -
193 - emmc2: emmc2@7e340000 {
194 - compatible = "brcm,bcm2711-emmc2";
195 - status = "okay";
196 - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
197 - clocks = <&clocks BCM2711_CLOCK_EMMC2>;
198 - reg = <0x0 0x7e340000 0x100>;
199 - vqmmc-supply = <&sd_io_1v8_reg>;
200 - broken-cd;
201 - };
202 };
203
204 /delete-node/ wifi-pwrseq;
205 @@ -557,6 +570,7 @@
206 eth_led0 = <&phy1>,"led-modes:0";
207 eth_led1 = <&phy1>,"led-modes:4";
208
209 + sd_poll_once = <&emmc2>, "non-removable?";
210 spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
211 <&spi0>, "dmas:8=", <&dma40>;
212 };
213 --- a/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
214 +++ b/arch/arm/boot/dts/bcm2711-rpi-cm4.dts
215 @@ -19,7 +19,9 @@
216 };
217
218 aliases {
219 + emmc2bus = &emmc2bus;
220 ethernet0 = &genet;
221 + pcie0 = &pcie0;
222 };
223
224 leds {
225 @@ -30,6 +32,8 @@
226 pwr {
227 label = "PWR";
228 gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
229 + default-state = "keep";
230 + linux,default-trigger = "default-on";
231 };
232 };
233
234 @@ -150,46 +154,6 @@
235 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
236 };
237
238 -&vc4 {
239 - status = "okay";
240 -};
241 -
242 -&pixelvalve0 {
243 - status = "okay";
244 -};
245 -
246 -&pixelvalve1 {
247 - status = "okay";
248 -};
249 -
250 -&pixelvalve2 {
251 - status = "okay";
252 -};
253 -
254 -&pixelvalve3 {
255 - status = "okay";
256 -};
257 -
258 -&pixelvalve4 {
259 - status = "okay";
260 -};
261 -
262 -&hdmi0 {
263 - status = "okay";
264 -};
265 -
266 -&ddc0 {
267 - status = "okay";
268 -};
269 -
270 -&hdmi1 {
271 - status = "okay";
272 -};
273 -
274 -&ddc1 {
275 - status = "okay";
276 -};
277 -
278 // =============================================
279 // Downstream rpi- changes
280
281 @@ -208,8 +172,6 @@
282 #include "bcm283x-rpi-csi1-4lane.dtsi"
283 #include "bcm283x-rpi-i2c0mux_0_44.dtsi"
284
285 -/delete-node/ &emmc2;
286 -
287 / {
288 chosen {
289 bootargs = "coherent_pool=1M 8250.nr_uarts=1 snd_bcm2835.enable_compat_alsa=0 snd_bcm2835.enable_hdmi=1 snd_bcm2835.enable_headphones=1";
290 @@ -226,29 +188,7 @@
291 i2c4 = &i2c4;
292 i2c5 = &i2c5;
293 i2c6 = &i2c6;
294 - /delete-property/ ethernet;
295 /delete-property/ intc;
296 - pcie0 = &pcie0;
297 - emmc2bus = &emmc2bus;
298 - };
299 -
300 - emmc2bus: emmc2bus {
301 - compatible = "simple-bus";
302 - #address-cells = <2>;
303 - #size-cells = <1>;
304 -
305 - ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
306 - dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
307 -
308 - emmc2: emmc2@7e340000 {
309 - compatible = "brcm,bcm2711-emmc2";
310 - status = "okay";
311 - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
312 - clocks = <&clocks BCM2711_CLOCK_EMMC2>;
313 - reg = <0x0 0x7e340000 0x100>;
314 - vqmmc-supply = <&sd_io_1v8_reg>;
315 - broken-cd;
316 - };
317 };
318
319 /delete-node/ wifi-pwrseq;
320 @@ -588,6 +528,7 @@
321 <&ant2>, "output-high?=off",
322 <&ant2>, "output-low?=on";
323
324 + sd_poll_once = <&emmc2>, "non-removable?";
325 spi_dma4 = <&spi0>, "dmas:0=", <&dma40>,
326 <&spi0>, "dmas:8=", <&dma40>;
327 };
328 --- a/arch/arm/boot/dts/bcm2711-rpi.dtsi
329 +++ b/arch/arm/boot/dts/bcm2711-rpi.dtsi
330 @@ -4,6 +4,129 @@
331 / {
332 soc {
333 /delete-node/ v3d@7ec00000;
334 +
335 + pixelvalve0: pixelvalve@7e206000 {
336 + compatible = "brcm,bcm2711-pixelvalve0";
337 + reg = <0x7e206000 0x100>;
338 + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
339 + status = "disabled";
340 + };
341 +
342 + pixelvalve1: pixelvalve@7e207000 {
343 + compatible = "brcm,bcm2711-pixelvalve1";
344 + reg = <0x7e207000 0x100>;
345 + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
346 + status = "disabled";
347 + };
348 +
349 + pixelvalve2: pixelvalve@7e20a000 {
350 + compatible = "brcm,bcm2711-pixelvalve2";
351 + reg = <0x7e20a000 0x100>;
352 + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
353 + status = "disabled";
354 + };
355 +
356 + pixelvalve4: pixelvalve@7e216000 {
357 + compatible = "brcm,bcm2711-pixelvalve4";
358 + reg = <0x7e216000 0x100>;
359 + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
360 + status = "disabled";
361 + };
362 +
363 + pixelvalve3: pixelvalve@7ec12000 {
364 + compatible = "brcm,bcm2711-pixelvalve3";
365 + reg = <0x7ec12000 0x100>;
366 + interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
367 + status = "disabled";
368 + };
369 +
370 + dvp: clock@7ef00000 {
371 + compatible = "brcm,brcm2711-dvp";
372 + reg = <0x7ef00000 0x10>;
373 + clocks = <&clk_108MHz>;
374 + #clock-cells = <1>;
375 + #reset-cells = <1>;
376 + };
377 +
378 + hdmi0: hdmi@7ef00700 {
379 + compatible = "brcm,bcm2711-hdmi0";
380 + reg = <0x7ef00700 0x300>,
381 + <0x7ef00300 0x200>,
382 + <0x7ef00f00 0x80>,
383 + <0x7ef00f80 0x80>,
384 + <0x7ef01b00 0x200>,
385 + <0x7ef01f00 0x400>,
386 + <0x7ef00200 0x80>,
387 + <0x7ef04300 0x100>,
388 + <0x7ef20000 0x100>,
389 + <0x7ef00100 0x30>;
390 + reg-names = "hdmi",
391 + "dvp",
392 + "phy",
393 + "rm",
394 + "packet",
395 + "metadata",
396 + "csc",
397 + "cec",
398 + "hd",
399 + "intr2";
400 + clocks = <&firmware_clocks 13>;
401 + clock-names = "hdmi";
402 + resets = <&dvp 0>;
403 + ddc = <&ddc0>;
404 + dmas = <&dma 10>;
405 + dma-names = "audio-rx";
406 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
407 + status = "disabled";
408 + };
409 +
410 + ddc0: i2c@7ef04500 {
411 + compatible = "brcm,bcm2711-hdmi-i2c";
412 + reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
413 + reg-names = "bsc", "auto-i2c";
414 + clock-frequency = <97500>;
415 + status = "disabled";
416 + };
417 +
418 + hdmi1: hdmi@7ef05700 {
419 + compatible = "brcm,bcm2711-hdmi1";
420 + reg = <0x7ef05700 0x300>,
421 + <0x7ef05300 0x200>,
422 + <0x7ef05f00 0x80>,
423 + <0x7ef05f80 0x80>,
424 + <0x7ef06b00 0x200>,
425 + <0x7ef06f00 0x400>,
426 + <0x7ef00280 0x80>,
427 + <0x7ef09300 0x100>,
428 + <0x7ef20000 0x100>,
429 + <0x7ef00100 0x30>;
430 + reg-names = "hdmi",
431 + "dvp",
432 + "phy",
433 + "rm",
434 + "packet",
435 + "metadata",
436 + "csc",
437 + "cec",
438 + "hd",
439 + "intr2";
440 + ddc = <&ddc1>;
441 + clocks = <&firmware_clocks 13>;
442 + clock-names = "hdmi";
443 + resets = <&dvp 1>;
444 + dmas = <&dma 17>;
445 + dma-names = "audio-rx";
446 + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
447 + status = "disabled";
448 + };
449 +
450 + ddc1: i2c@7ef09500 {
451 + compatible = "brcm,bcm2711-hdmi-i2c";
452 + reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
453 + reg-names = "bsc", "auto-i2c";
454 + clock-frequency = <97500>;
455 + status = "disabled";
456 + };
457 };
458
459 __overrides__ {
460 @@ -42,22 +165,33 @@
461 scb: scb {
462 /* Add a label */
463 };
464 -};
465
466 -&cma {
467 - /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
468 - alloc-ranges = <0x0 0x00000000 0x30000000>;
469 + vc4: gpu {
470 + compatible = "brcm,bcm2711-vc5";
471 + status = "disabled";
472 + };
473 +
474 + clk_108MHz: clk-108M {
475 + #clock-cells = <0>;
476 + compatible = "fixed-clock";
477 + clock-frequency = <108000000>;
478 + clock-output-names = "108MHz-clock";
479 + };
480 };
481
482 &soc {
483 /delete-node/ audio;
484 };
485
486 +&cma {
487 + /* Limit cma to the lower 768MB to allow room for HIGHMEM on 32-bit */
488 + alloc-ranges = <0x0 0x00000000 0x30000000>;
489 +};
490 +
491 &scb {
492 ranges = <0x0 0x7c000000 0x0 0xfc000000 0x0 0x03800000>,
493 <0x0 0x40000000 0x0 0xff800000 0x0 0x00800000>,
494 - <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>,
495 - <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>;
496 + <0x6 0x00000000 0x6 0x00000000 0x0 0x40000000>;
497 dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0xfc000000>,
498 <0x1 0x00000000 0x1 0x00000000 0x1 0x00000000>;
499
500 @@ -171,6 +305,10 @@
501 compatible = "brcm,bcm2711-genet-v5", "brcm,genet-v5";
502 };
503
504 +&hvs {
505 + clocks = <&firmware_clocks 4>;
506 +};
507 +
508 &firmware {
509 firmware_clocks: clocks {
510 compatible = "raspberrypi,firmware-clocks";
511 --- a/arch/arm/boot/dts/bcm2711.dtsi
512 +++ b/arch/arm/boot/dts/bcm2711.dtsi
513 @@ -12,18 +12,6 @@
514
515 interrupt-parent = <&gicv2>;
516
517 - vc4: gpu {
518 - compatible = "brcm,bcm2711-vc5";
519 - status = "disabled";
520 - };
521 -
522 - clk_108MHz: clk-108M {
523 - #clock-cells = <0>;
524 - compatible = "fixed-clock";
525 - clock-frequency = <108000000>;
526 - clock-output-names = "108MHz-clock";
527 - };
528 -
529 soc {
530 /*
531 * Defined ranges:
532 @@ -245,27 +233,6 @@
533 status = "disabled";
534 };
535
536 - pixelvalve0: pixelvalve@7e206000 {
537 - compatible = "brcm,bcm2711-pixelvalve0";
538 - reg = <0x7e206000 0x100>;
539 - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
540 - status = "disabled";
541 - };
542 -
543 - pixelvalve1: pixelvalve@7e207000 {
544 - compatible = "brcm,bcm2711-pixelvalve1";
545 - reg = <0x7e207000 0x100>;
546 - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
547 - status = "disabled";
548 - };
549 -
550 - pixelvalve2: pixelvalve@7e20a000 {
551 - compatible = "brcm,bcm2711-pixelvalve2";
552 - reg = <0x7e20a000 0x100>;
553 - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
554 - status = "disabled";
555 - };
556 -
557 pwm1: pwm@7e20c800 {
558 compatible = "brcm,bcm2835-pwm";
559 reg = <0x7e20c800 0x28>;
560 @@ -276,118 +243,30 @@
561 status = "disabled";
562 };
563
564 - pixelvalve4: pixelvalve@7e216000 {
565 - compatible = "brcm,bcm2711-pixelvalve4";
566 - reg = <0x7e216000 0x100>;
567 - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
568 - status = "disabled";
569 - };
570 -
571 - emmc2: emmc2@7e340000 {
572 - compatible = "brcm,bcm2711-emmc2";
573 - reg = <0x7e340000 0x100>;
574 - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
575 - clocks = <&clocks BCM2711_CLOCK_EMMC2>;
576 - status = "disabled";
577 - };
578 -
579 hvs@7e400000 {
580 - clocks = <&firmware_clocks 4>;
581 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
582 };
583 + };
584
585 - pixelvalve3: pixelvalve@7ec12000 {
586 - compatible = "brcm,bcm2711-pixelvalve3";
587 - reg = <0x7ec12000 0x100>;
588 - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
589 - status = "disabled";
590 - };
591 + /*
592 + * emmc2 has different DMA constraints based on SoC revisions. It was
593 + * moved into its own bus, so as for RPi4's firmware to update them.
594 + * The firmware will find whether the emmc2bus alias is defined, and if
595 + * so, it'll edit the dma-ranges property below accordingly.
596 + */
597 + emmc2bus: emmc2bus {
598 + compatible = "simple-bus";
599 + #address-cells = <2>;
600 + #size-cells = <1>;
601
602 - dvp: clock@7ef00000 {
603 - compatible = "brcm,brcm2711-dvp";
604 - reg = <0x7ef00000 0x10>;
605 - clocks = <&clk_108MHz>;
606 - #clock-cells = <1>;
607 - #reset-cells = <1>;
608 - };
609 + ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
610 + dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
611
612 - hdmi0: hdmi@7ef00700 {
613 - compatible = "brcm,bcm2711-hdmi0";
614 - reg = <0x7ef00700 0x300>,
615 - <0x7ef00300 0x200>,
616 - <0x7ef00f00 0x80>,
617 - <0x7ef00f80 0x80>,
618 - <0x7ef01b00 0x200>,
619 - <0x7ef01f00 0x400>,
620 - <0x7ef00200 0x80>,
621 - <0x7ef04300 0x100>,
622 - <0x7ef20000 0x100>,
623 - <0x7ef00100 0x30>;
624 - reg-names = "hdmi",
625 - "dvp",
626 - "phy",
627 - "rm",
628 - "packet",
629 - "metadata",
630 - "csc",
631 - "cec",
632 - "hd",
633 - "intr2";
634 - clocks = <&firmware_clocks 13>;
635 - clock-names = "hdmi";
636 - resets = <&dvp 0>;
637 - ddc = <&ddc0>;
638 - dmas = <&dma 10>;
639 - dma-names = "audio-rx";
640 - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
641 - status = "disabled";
642 - };
643 -
644 - ddc0: i2c@7ef04500 {
645 - compatible = "brcm,bcm2711-hdmi-i2c";
646 - reg = <0x7ef04500 0x100>, <0x7ef00b00 0x300>;
647 - reg-names = "bsc", "auto-i2c";
648 - clock-frequency = <97500>;
649 - status = "disabled";
650 - };
651 -
652 - hdmi1: hdmi@7ef05700 {
653 - compatible = "brcm,bcm2711-hdmi1";
654 - reg = <0x7ef05700 0x300>,
655 - <0x7ef05300 0x200>,
656 - <0x7ef05f00 0x80>,
657 - <0x7ef05f80 0x80>,
658 - <0x7ef06b00 0x200>,
659 - <0x7ef06f00 0x400>,
660 - <0x7ef00280 0x80>,
661 - <0x7ef09300 0x100>,
662 - <0x7ef20000 0x100>,
663 - <0x7ef00100 0x30>;
664 - reg-names = "hdmi",
665 - "dvp",
666 - "phy",
667 - "rm",
668 - "packet",
669 - "metadata",
670 - "csc",
671 - "cec",
672 - "hd",
673 - "intr2";
674 - ddc = <&ddc1>;
675 - clocks = <&firmware_clocks 13>;
676 - clock-names = "hdmi";
677 - resets = <&dvp 1>;
678 - dmas = <&dma 17>;
679 - dma-names = "audio-rx";
680 - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
681 - status = "disabled";
682 - };
683 -
684 - ddc1: i2c@7ef09500 {
685 - compatible = "brcm,bcm2711-hdmi-i2c";
686 - reg = <0x7ef09500 0x100>, <0x7ef05b00 0x300>;
687 - reg-names = "bsc", "auto-i2c";
688 - clock-frequency = <97500>;
689 + emmc2: emmc2@7e340000 {
690 + compatible = "brcm,bcm2711-emmc2";
691 + reg = <0x0 0x7e340000 0x100>;
692 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
693 + clocks = <&clocks BCM2711_CLOCK_EMMC2>;
694 status = "disabled";
695 };
696 };
OpenWrt Source Repository