target/linux/bcm27xx/patches-5.4/950-0823-media-i2c-imx290-Add-RAW12-mode-support.patch

   1 From 9f6a310ab3b466940c0a15260987d4cfe868a79a Mon Sep 17 00:00:00 2001
   2 From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
   3 Date: Fri, 12 Jun 2020 15:53:52 +0200
   4 Subject: [PATCH] media: i2c: imx290: Add RAW12 mode support
   5
   6 Commit c566ac01ceaa02450acc155201772c0623530e76 upstream.
   7
   8 IMX290 is capable of outputting frames in both Raw Bayer (packed) 10 and
   9 12 bit formats. Since the driver already supports RAW10 mode, let's add
  10 the missing RAW12 mode as well.
  11
  12 Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
  13 Signed-off-by: Andrey Konovalov <andrey.konovalov@linaro.org>
  14 Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
  15 Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
  16 ---
  17  drivers/media/i2c/imx290.c | 36 +++++++++++++++++++++++++++++++++---
  18  1 file changed, 33 insertions(+), 3 deletions(-)
  19
  20 --- a/drivers/media/i2c/imx290.c
  21 +++ b/drivers/media/i2c/imx290.c
  22 @@ -67,6 +67,7 @@ struct imx290 {
  23         struct clk *xclk;
  24         struct regmap *regmap;
  25         u8 nlanes;
  26 +       u8 bpp;
  27
  28         struct v4l2_subdev sd;
  29         struct v4l2_fwnode_endpoint ep;
  30 @@ -86,10 +87,12 @@ struct imx290 {
  31
  32  struct imx290_pixfmt {
  33         u32 code;
  34 +       u8 bpp;
  35  };
  36
  37  static const struct imx290_pixfmt imx290_formats[] = {
  38 -       { MEDIA_BUS_FMT_SRGGB10_1X10 },
  39 +       { MEDIA_BUS_FMT_SRGGB10_1X10, 10 },
  40 +       { MEDIA_BUS_FMT_SRGGB12_1X12, 12 },
  41  };
  42
  43  static const struct regmap_config imx290_regmap_config = {
  44 @@ -257,6 +260,18 @@ static const struct imx290_regval imx290
  45         { 0x300b, 0x00},
  46  };
  47
  48 +static const struct imx290_regval imx290_12bit_settings[] = {
  49 +       { 0x3005, 0x01 },
  50 +       { 0x3046, 0x01 },
  51 +       { 0x3129, 0x00 },
  52 +       { 0x317c, 0x00 },
  53 +       { 0x31ec, 0x0e },
  54 +       { 0x3441, 0x0c },
  55 +       { 0x3442, 0x0c },
  56 +       { 0x300a, 0xf0 },
  57 +       { 0x300b, 0x00 },
  58 +};
  59 +
  60  /* supported link frequencies */
  61  #define FREQ_INDEX_1080P       0
  62  #define FREQ_INDEX_720P                1
  63 @@ -478,7 +493,12 @@ static int imx290_set_ctrl(struct v4l2_c
  64                 } else {
  65                         imx290_write_reg(imx290, IMX290_PGCTRL, 0x00);
  66                         msleep(10);
  67 -                       imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW, 0x3c);
  68 +                       if (imx290->bpp == 10)
  69 +                               imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW,
  70 +                                                0x3c);
  71 +                       else /* 12 bits per pixel */
  72 +                               imx290_write_reg(imx290, IMX290_BLKLEVEL_LOW,
  73 +                                                0xf0);
  74                         imx290_write_reg(imx290, IMX290_BLKLEVEL_HIGH, 0x00);
  75                 }
  76                 break;
  77 @@ -550,7 +570,7 @@ static u64 imx290_calc_pixel_rate(struct
  78
  79         /* pixel rate = link_freq * 2 * nr_of_lanes / bits_per_sample */
  80         pixel_rate = link_freq * 2 * nlanes;
  81 -       do_div(pixel_rate, 10);
  82 +       do_div(pixel_rate, imx290->bpp);
  83         return pixel_rate;
  84  }
  85
  86 @@ -587,6 +607,7 @@ static int imx290_set_fmt(struct v4l2_su
  87         } else {
  88                 format = &imx290->current_format;
  89                 imx290->current_mode = mode;
  90 +               imx290->bpp = imx290_formats[i].bpp;
  91
  92                 if (imx290->link_freq)
  93                         __v4l2_ctrl_s_ctrl(imx290->link_freq,
  94 @@ -629,6 +650,15 @@ static int imx290_write_current_format(s
  95                 if (ret < 0) {
  96                         dev_err(imx290->dev, "Could not set format registers\n");
  97                         return ret;
  98 +               }
  99 +               break;
 100 +       case MEDIA_BUS_FMT_SRGGB12_1X12:
 101 +               ret = imx290_set_register_array(imx290, imx290_12bit_settings,
 102 +                                               ARRAY_SIZE(
 103 +                                                       imx290_12bit_settings));
 104 +               if (ret < 0) {
 105 +                       dev_err(imx290->dev, "Could not set format registers\n");
 106 +                       return ret;
 107                 }
 108                 break;
 109         default: