bcm27xx: update patches from RPi foundation
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.4 / 950-0586-drm-vc4-hdmi-Add-PHY-RNG-enable-disable-function.patch
1 From ddf78df1db8752247e89a68231338a194e5dc52b Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Thu, 19 Dec 2019 17:22:24 +0100
4 Subject: [PATCH] drm/vc4: hdmi: Add PHY RNG enable / disable function
5
6 Let's continue the implementation of hooks for the parts that change in the
7 BCM2711 SoC with the PHY RNG setup.
8
9 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
10 ---
11 drivers/gpu/drm/vc4/vc4_hdmi.c | 15 +++++++++------
12 drivers/gpu/drm/vc4/vc4_hdmi.h | 8 ++++++++
13 drivers/gpu/drm/vc4/vc4_hdmi_phy.c | 15 +++++++++++++++
14 3 files changed, 32 insertions(+), 6 deletions(-)
15
16 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c
17 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
18 @@ -765,9 +765,9 @@ static int vc4_hdmi_audio_trigger(struct
19 switch (cmd) {
20 case SNDRV_PCM_TRIGGER_START:
21 vc4_hdmi_set_audio_infoframe(encoder);
22 - HDMI_WRITE(HDMI_TX_PHY_CTL_0,
23 - HDMI_READ(HDMI_TX_PHY_CTL_0) &
24 - ~VC4_HDMI_TX_PHY_RNG_PWRDN);
25 +
26 + if (vc4_hdmi->variant->phy_rng_enable)
27 + vc4_hdmi->variant->phy_rng_enable(vc4_hdmi);
28
29 HDMI_WRITE(HDMI_MAI_CTL,
30 VC4_SET_FIELD(vc4_hdmi->audio.channels,
31 @@ -779,9 +779,10 @@ static int vc4_hdmi_audio_trigger(struct
32 VC4_HD_MAI_CTL_DLATE |
33 VC4_HD_MAI_CTL_ERRORE |
34 VC4_HD_MAI_CTL_ERRORF);
35 - HDMI_WRITE(HDMI_TX_PHY_CTL_0,
36 - HDMI_READ(HDMI_TX_PHY_CTL_0) |
37 - VC4_HDMI_TX_PHY_RNG_PWRDN);
38 +
39 + if (vc4_hdmi->variant->phy_rng_disable)
40 + vc4_hdmi->variant->phy_rng_disable(vc4_hdmi);
41 +
42 break;
43 default:
44 break;
45 @@ -1428,6 +1429,8 @@ static const struct vc4_hdmi_variant bcm
46 .reset = vc4_hdmi_reset,
47 .phy_init = vc4_hdmi_phy_init,
48 .phy_disable = vc4_hdmi_phy_disable,
49 + .phy_rng_enable = vc4_hdmi_phy_rng_enable,
50 + .phy_rng_disable = vc4_hdmi_phy_rng_disable,
51 };
52
53 static const struct of_device_id vc4_hdmi_dt_match[] = {
54 --- a/drivers/gpu/drm/vc4/vc4_hdmi.h
55 +++ b/drivers/gpu/drm/vc4/vc4_hdmi.h
56 @@ -47,6 +47,12 @@ struct vc4_hdmi_variant {
57
58 /* Callback to disable the PHY */
59 void (*phy_disable)(struct vc4_hdmi *vc4_hdmi);
60 +
61 + /* Callback to enable the RNG in the PHY */
62 + void (*phy_rng_enable)(struct vc4_hdmi *vc4_hdmi);
63 +
64 + /* Callback to disable the RNG in the PHY */
65 + void (*phy_rng_disable)(struct vc4_hdmi *vc4_hdmi);
66 };
67
68 /* HDMI audio information */
69 @@ -107,5 +113,7 @@ encoder_to_vc4_hdmi(struct drm_encoder *
70 void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi,
71 struct drm_display_mode *mode);
72 void vc4_hdmi_phy_disable(struct vc4_hdmi *vc4_hdmi);
73 +void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi);
74 +void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi);
75
76 #endif /* _VC4_HDMI_H_ */
77 --- a/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
78 +++ b/drivers/gpu/drm/vc4/vc4_hdmi_phy.c
79 @@ -7,6 +7,7 @@
80 */
81
82 #include "vc4_hdmi.h"
83 +#include "vc4_regs.h"
84 #include "vc4_hdmi_regs.h"
85
86 void vc4_hdmi_phy_init(struct vc4_hdmi *vc4_hdmi, struct drm_display_mode *mode)
87 @@ -23,3 +24,17 @@ void vc4_hdmi_phy_disable(struct vc4_hdm
88 {
89 HDMI_WRITE(HDMI_TX_PHY_RESET_CTL, 0xf << 16);
90 }
91 +
92 +void vc4_hdmi_phy_rng_enable(struct vc4_hdmi *vc4_hdmi)
93 +{
94 + HDMI_WRITE(HDMI_TX_PHY_CTL_0,
95 + HDMI_READ(HDMI_TX_PHY_CTL_0) &
96 + ~VC4_HDMI_TX_PHY_RNG_PWRDN);
97 +}
98 +
99 +void vc4_hdmi_phy_rng_disable(struct vc4_hdmi *vc4_hdmi)
100 +{
101 + HDMI_WRITE(HDMI_TX_PHY_CTL_0,
102 + HDMI_READ(HDMI_TX_PHY_CTL_0) |
103 + VC4_HDMI_TX_PHY_RNG_PWRDN);
104 +}