09f023e09ce2da2bc48c0adec7a068d67d12751b
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.4 / 950-0525-clk-bcm-rpi-Add-clock-id-to-data.patch
1 From 98d529ffea66937e8a9ba8b69172bb9c599cfa39 Mon Sep 17 00:00:00 2001
2 From: Maxime Ripard <maxime@cerno.tech>
3 Date: Fri, 7 Feb 2020 16:04:16 +0100
4 Subject: [PATCH] clk: bcm: rpi: Add clock id to data
5
6 The driver has really only supported one clock so far and has hardcoded the
7 ID used in communications with the firmware in all the functions
8 implementing the clock framework hooks. Let's store that in the clock data
9 structure so that we can support more clocks later on.
10
11 Cc: Michael Turquette <mturquette@baylibre.com>
12 Cc: linux-clk@vger.kernel.org
13 Acked-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de>
14 Reviewed-by: Stephen Boyd <sboyd@kernel.org>
15 Signed-off-by: Maxime Ripard <maxime@cerno.tech>
16 ---
17 drivers/clk/bcm/clk-raspberrypi.c | 16 +++++++---------
18 1 file changed, 7 insertions(+), 9 deletions(-)
19
20 --- a/drivers/clk/bcm/clk-raspberrypi.c
21 +++ b/drivers/clk/bcm/clk-raspberrypi.c
22 @@ -39,6 +39,7 @@ struct raspberrypi_clk {
23
24 struct raspberrypi_clk_data {
25 struct clk_hw hw;
26 + unsigned id;
27
28 unsigned long min_rate;
29 unsigned long max_rate;
30 @@ -95,7 +96,7 @@ static int raspberrypi_fw_pll_is_on(stru
31
32 ret = raspberrypi_clock_property(rpi->firmware,
33 RPI_FIRMWARE_GET_CLOCK_STATE,
34 - RPI_FIRMWARE_ARM_CLK_ID, &val);
35 + data->id, &val);
36 if (ret)
37 return 0;
38
39 @@ -114,8 +115,7 @@ static unsigned long raspberrypi_fw_pll_
40
41 ret = raspberrypi_clock_property(rpi->firmware,
42 RPI_FIRMWARE_GET_CLOCK_RATE,
43 - RPI_FIRMWARE_ARM_CLK_ID,
44 - &val);
45 + data->id, &val);
46 if (ret)
47 return ret;
48
49 @@ -133,8 +133,7 @@ static int raspberrypi_fw_pll_set_rate(s
50
51 ret = raspberrypi_clock_property(rpi->firmware,
52 RPI_FIRMWARE_SET_CLOCK_RATE,
53 - RPI_FIRMWARE_ARM_CLK_ID,
54 - &new_rate);
55 + data->id, &new_rate);
56 if (ret)
57 dev_err_ratelimited(rpi->dev, "Failed to change %s frequency: %d",
58 clk_hw_get_name(hw), ret);
59 @@ -189,6 +188,7 @@ static int raspberrypi_register_pllb(str
60 if (!data)
61 return -ENOMEM;
62 data->rpi = rpi;
63 + data->id = RPI_FIRMWARE_ARM_CLK_ID;
64
65 /* All of the PLLs derive from the external oscillator. */
66 init.parent_names = (const char *[]){ "osc" };
67 @@ -200,8 +200,7 @@ static int raspberrypi_register_pllb(str
68 /* Get min & max rates set by the firmware */
69 ret = raspberrypi_clock_property(rpi->firmware,
70 RPI_FIRMWARE_GET_MIN_CLOCK_RATE,
71 - RPI_FIRMWARE_ARM_CLK_ID,
72 - &min_rate);
73 + data->id, &min_rate);
74 if (ret) {
75 dev_err(rpi->dev, "Failed to get %s min freq: %d\n",
76 init.name, ret);
77 @@ -210,8 +209,7 @@ static int raspberrypi_register_pllb(str
78
79 ret = raspberrypi_clock_property(rpi->firmware,
80 RPI_FIRMWARE_GET_MAX_CLOCK_RATE,
81 - RPI_FIRMWARE_ARM_CLK_ID,
82 - &max_rate);
83 + data->id, &max_rate);
84 if (ret) {
85 dev_err(rpi->dev, "Failed to get %s max freq: %d\n",
86 init.name, ret);