projects / openwrt / openwrt.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
bcm27xx-gpu-fw: update to latest version
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.4 / 950-0420-ARM-dts-Revert-all-changes-to-upstream-dts-files.patch
1 From e90536d721612de6a2619ae6727ee12b56bb2660 Mon Sep 17 00:00:00 2001
2 From: Phil Elwell <phil@raspberrypi.com>
3 Date: Thu, 30 Jan 2020 11:39:39 +0000
4 Subject: [PATCH] ARM: dts: Revert all changes to upstream dts files
5
6 With the possible exception of bcm2711* files where there is a name
7 clash, we should not be modifying upstream DTS files.
8
9 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
10 ---
11 arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 348 ++------
12 arch/arm/boot/dts/bcm2711.dtsi | 888 ++++++++++++++++++++-
13 arch/arm/boot/dts/bcm2835-common.dtsi | 131 +++
14 arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 1 -
15 arch/arm/boot/dts/bcm2835-rpi-a.dts | 1 -
16 arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 1 -
17 arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 1 -
18 arch/arm/boot/dts/bcm2835-rpi-b.dts | 1 -
19 arch/arm/boot/dts/bcm2835-rpi-zero.dts | 1 -
20 arch/arm/boot/dts/bcm2835-rpi.dtsi | 37 -
21 arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 1 -
22 arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 -
23 arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 15 -
24 arch/arm/boot/dts/bcm283x.dtsi | 152 +---
25 14 files changed, 1068 insertions(+), 511 deletions(-)
26
27 --- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
28 +++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
29 @@ -1,54 +1,57 @@
30 +// SPDX-License-Identifier: GPL-2.0
31 /dts-v1/;
32 -
33 #include "bcm2711.dtsi"
34 -#include "bcm2711-rpi.dtsi"
35 -#include "bcm283x-rpi-csi1-2lane.dtsi"
36 +#include "bcm2835-rpi.dtsi"
37 +#include "bcm283x-rpi-usb-peripheral.dtsi"
38
39 / {
40 compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
41 model = "Raspberry Pi 4 Model B";
42
43 - memory@0 {
44 - device_type = "memory";
45 - reg = <0x0 0x0 0x0>;
46 + chosen {
47 + /* 8250 auxiliary UART instead of pl011 */
48 + stdout-path = "serial1:115200n8";
49 };
50
51 - chosen {
52 - bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M";
53 + /* Will be filled by the bootloader */
54 + memory@0 {
55 + device_type = "memory";
56 + reg = <0 0 0>;
57 };
58
59 aliases {
60 - serial0 = &uart1;
61 - serial1 = &uart0;
62 - mmc0 = &emmc2;
63 - mmc1 = &mmcnr;
64 - mmc2 = &sdhost;
65 - i2c3 = &i2c3;
66 - i2c4 = &i2c4;
67 - i2c5 = &i2c5;
68 - i2c6 = &i2c6;
69 - /delete-property/ ethernet;
70 - /delete-property/ intc;
71 ethernet0 = &genet;
72 - pcie0 = &pcie_0;
73 };
74 -};
75
76 -&soc {
77 - virtgpio: virtgpio {
78 - compatible = "brcm,bcm2835-virtgpio";
79 - gpio-controller;
80 - #gpio-cells = <2>;
81 - firmware = <&firmware>;
82 - status = "okay";
83 + leds {
84 + act {
85 + gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
86 + };
87 +
88 + pwr {
89 + label = "PWR";
90 + gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
91 + };
92 };
93 -};
94
95 -&mmcnr {
96 - pinctrl-names = "default";
97 - pinctrl-0 = <&sdio_pins>;
98 - bus-width = <4>;
99 - status = "okay";
100 + wifi_pwrseq: wifi-pwrseq {
101 + compatible = "mmc-pwrseq-simple";
102 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
103 + };
104 +
105 + sd_io_1v8_reg: sd_io_1v8_reg {
106 + compatible = "regulator-gpio";
107 + regulator-name = "vdd-sd-io";
108 + regulator-min-microvolt = <1800000>;
109 + regulator-max-microvolt = <3300000>;
110 + regulator-boot-on;
111 + regulator-always-on;
112 + regulator-settling-time-us = <5000>;
113 + gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
114 + states = <1800000 0x1
115 + 3300000 0x0>;
116 + status = "okay";
117 + };
118 };
119
120 &firmware {
121 @@ -68,81 +71,34 @@
122 };
123 };
124
125 -&uart0 {
126 +&pwm1 {
127 pinctrl-names = "default";
128 - pinctrl-0 = <&uart0_pins &bt_pins>;
129 + pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
130 status = "okay";
131 };
132
133 -&uart1 {
134 +/* SDHCI is used to control the SDIO for wireless */
135 +&sdhci {
136 + #address-cells = <1>;
137 + #size-cells = <0>;
138 pinctrl-names = "default";
139 - pinctrl-0 = <&uart1_pins>;
140 + pinctrl-0 = <&emmc_gpio34>;
141 + bus-width = <4>;
142 + non-removable;
143 + mmc-pwrseq = <&wifi_pwrseq>;
144 status = "okay";
145 -};
146
147 -&spi0 {
148 - pinctrl-names = "default";
149 - pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
150 - cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
151 -
152 - spidev0: spidev@0{
153 - compatible = "spidev";
154 - reg = <0>; /* CE0 */
155 - #address-cells = <1>;
156 - #size-cells = <0>;
157 - spi-max-frequency = <125000000>;
158 - };
159 -
160 - spidev1: spidev@1{
161 - compatible = "spidev";
162 - reg = <1>; /* CE1 */
163 - #address-cells = <1>;
164 - #size-cells = <0>;
165 - spi-max-frequency = <125000000>;
166 - };
167 -};
168 -
169 -// =============================================
170 -// Board specific stuff here
171 -
172 -/ {
173 -
174 - sd_io_1v8_reg: sd_io_1v8_reg {
175 - status = "okay";
176 - compatible = "regulator-gpio";
177 - vin-supply = <&vdd_5v0_reg>;
178 - regulator-name = "vdd-sd-io";
179 - regulator-min-microvolt = <1800000>;
180 - regulator-max-microvolt = <3300000>;
181 - regulator-boot-on;
182 - regulator-always-on;
183 - regulator-settling-time-us = <5000>;
184 -
185 - gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
186 - states = <1800000 0x1
187 - 3300000 0x0>;
188 + brcmf: wifi@1 {
189 + reg = <1>;
190 + compatible = "brcm,bcm4329-fmac";
191 };
192 -
193 - sd_vcc_reg: sd_vcc_reg {
194 - compatible = "regulator-fixed";
195 - regulator-name = "vcc-sd";
196 - regulator-min-microvolt = <3300000>;
197 - regulator-max-microvolt = <3300000>;
198 - regulator-boot-on;
199 - enable-active-high;
200 - gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
201 - };
202 -};
203 -
204 -&sdhost {
205 - status = "disabled";
206 };
207
208 +/* EMMC2 is used to drive the SD card */
209 &emmc2 {
210 - status = "okay";
211 - broken-cd;
212 vqmmc-supply = <&sd_io_1v8_reg>;
213 - vmmc-supply = <&sd_vcc_reg>;
214 + broken-cd;
215 + status = "okay";
216 };
217
218 &genet {
219 @@ -155,200 +111,32 @@
220 phy1: ethernet-phy@1 {
221 /* No PHY interrupt */
222 reg = <0x1>;
223 - led-modes = <0x00 0x08>; /* link/activity link */
224 };
225 };
226
227 -&leds {
228 - act_led: act {
229 - label = "led0";
230 - linux,default-trigger = "mmc0";
231 - gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
232 - };
233 -
234 - pwr_led: pwr {
235 - label = "led1";
236 - linux,default-trigger = "default-on";
237 - gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
238 - };
239 -};
240 -
241 -&audio {
242 +/* uart0 communicates with the BT module */
243 +&uart0 {
244 pinctrl-names = "default";
245 - pinctrl-0 = <&audio_pins>;
246 -};
247 -
248 -&sdhost_gpio48 {
249 - brcm,pins = <22 23 24 25 26 27>;
250 - brcm,function = <BCM2835_FSEL_ALT0>;
251 -};
252 -
253 -&gpio {
254 - spi0_pins: spi0_pins {
255 - brcm,pins = <9 10 11>;
256 - brcm,function = <BCM2835_FSEL_ALT0>;
257 - };
258 -
259 - spi0_cs_pins: spi0_cs_pins {
260 - brcm,pins = <8 7>;
261 - brcm,function = <BCM2835_FSEL_GPIO_OUT>;
262 - };
263 -
264 - spi3_pins: spi3_pins {
265 - brcm,pins = <1 2 3>;
266 - brcm,function = <BCM2835_FSEL_ALT3>;
267 - };
268 -
269 - spi3_cs_pins: spi3_cs_pins {
270 - brcm,pins = <0 24>;
271 - brcm,function = <BCM2835_FSEL_GPIO_OUT>;
272 - };
273 -
274 - spi4_pins: spi4_pins {
275 - brcm,pins = <5 6 7>;
276 - brcm,function = <BCM2835_FSEL_ALT3>;
277 - };
278 -
279 - spi4_cs_pins: spi4_cs_pins {
280 - brcm,pins = <4 25>;
281 - brcm,function = <BCM2835_FSEL_GPIO_OUT>;
282 - };
283 -
284 - spi5_pins: spi5_pins {
285 - brcm,pins = <13 14 15>;
286 - brcm,function = <BCM2835_FSEL_ALT3>;
287 - };
288 -
289 - spi5_cs_pins: spi5_cs_pins {
290 - brcm,pins = <12 26>;
291 - brcm,function = <BCM2835_FSEL_GPIO_OUT>;
292 - };
293 -
294 - spi6_pins: spi6_pins {
295 - brcm,pins = <19 20 21>;
296 - brcm,function = <BCM2835_FSEL_ALT3>;
297 - };
298 -
299 - spi6_cs_pins: spi6_cs_pins {
300 - brcm,pins = <18 27>;
301 - brcm,function = <BCM2835_FSEL_GPIO_OUT>;
302 - };
303 -
304 - i2c0_pins: i2c0 {
305 - brcm,pins = <0 1>;
306 - brcm,function = <BCM2835_FSEL_ALT0>;
307 - brcm,pull = <BCM2835_PUD_UP>;
308 - };
309 -
310 - i2c1_pins: i2c1 {
311 - brcm,pins = <2 3>;
312 - brcm,function = <BCM2835_FSEL_ALT0>;
313 - brcm,pull = <BCM2835_PUD_UP>;
314 - };
315 -
316 - i2c3_pins: i2c3 {
317 - brcm,pins = <4 5>;
318 - brcm,function = <BCM2835_FSEL_ALT5>;
319 - brcm,pull = <BCM2835_PUD_UP>;
320 - };
321 -
322 - i2c4_pins: i2c4 {
323 - brcm,pins = <8 9>;
324 - brcm,function = <BCM2835_FSEL_ALT5>;
325 - brcm,pull = <BCM2835_PUD_UP>;
326 - };
327 -
328 - i2c5_pins: i2c5 {
329 - brcm,pins = <12 13>;
330 - brcm,function = <BCM2835_FSEL_ALT5>;
331 - brcm,pull = <BCM2835_PUD_UP>;
332 - };
333 -
334 - i2c6_pins: i2c6 {
335 - brcm,pins = <22 23>;
336 - brcm,function = <BCM2835_FSEL_ALT5>;
337 - brcm,pull = <BCM2835_PUD_UP>;
338 - };
339 -
340 - i2s_pins: i2s {
341 - brcm,pins = <18 19 20 21>;
342 - brcm,function = <BCM2835_FSEL_ALT0>;
343 - };
344 -
345 - sdio_pins: sdio_pins {
346 - brcm,pins = <34 35 36 37 38 39>;
347 - brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
348 - brcm,pull = <0 2 2 2 2 2>;
349 - };
350 -
351 - bt_pins: bt_pins {
352 - brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
353 - // to fool pinctrl
354 - brcm,function = <0>;
355 - brcm,pull = <2>;
356 - };
357 -
358 - uart0_pins: uart0_pins {
359 - brcm,pins = <32 33>;
360 - brcm,function = <BCM2835_FSEL_ALT3>;
361 - brcm,pull = <0 2>;
362 - };
363 -
364 - uart1_pins: uart1_pins {
365 - brcm,pins;
366 - brcm,function;
367 - brcm,pull;
368 - };
369 -
370 - uart2_pins: uart2_pins {
371 - brcm,pins = <0 1>;
372 - brcm,function = <BCM2835_FSEL_ALT4>;
373 - brcm,pull = <0 2>;
374 - };
375 -
376 - uart3_pins: uart3_pins {
377 - brcm,pins = <4 5>;
378 - brcm,function = <BCM2835_FSEL_ALT4>;
379 - brcm,pull = <0 2>;
380 - };
381 -
382 - uart4_pins: uart4_pins {
383 - brcm,pins = <8 9>;
384 - brcm,function = <BCM2835_FSEL_ALT4>;
385 - brcm,pull = <0 2>;
386 - };
387 -
388 - uart5_pins: uart5_pins {
389 - brcm,pins = <12 13>;
390 - brcm,function = <BCM2835_FSEL_ALT4>;
391 - brcm,pull = <0 2>;
392 - };
393 + pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
394 + uart-has-rtscts;
395 + status = "okay";
396
397 - audio_pins: audio_pins {
398 - brcm,pins = <40 41>;
399 - brcm,function = <4>;
400 + bluetooth {
401 + compatible = "brcm,bcm43438-bt";
402 + max-speed = <2000000>;
403 + shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
404 };
405 };
406
407 -&i2c0 {
408 - pinctrl-names = "default";
409 - pinctrl-0 = <&i2c0_pins>;
410 - clock-frequency = <100000>;
411 -};
412 -
413 -&i2c1 {
414 +/* uart1 is mapped to the pin header */
415 +&uart1 {
416 pinctrl-names = "default";
417 - pinctrl-0 = <&i2c1_pins>;
418 - clock-frequency = <100000>;
419 -};
420 -
421 -&i2c2 {
422 - clock-frequency = <100000>;
423 + pinctrl-0 = <&uart1_gpio14>;
424 + status = "okay";
425 };
426
427 -&i2s {
428 - pinctrl-names = "default";
429 - pinctrl-0 = <&i2s_pins>;
430 +&vchiq {
431 + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
432 };
433
434 / {
435 --- a/arch/arm/boot/dts/bcm2711.dtsi
436 +++ b/arch/arm/boot/dts/bcm2711.dtsi
437 @@ -1,44 +1,890 @@
438 -#include "bcm2838.dtsi"
439 -#include "bcm270x.dtsi"
440 +// SPDX-License-Identifier: GPL-2.0
441 +#include "bcm283x.dtsi"
442 +
443 +#include <dt-bindings/interrupt-controller/arm-gic.h>
444 +#include <dt-bindings/soc/bcm2835-pm.h>
445
446 / {
447 + compatible = "brcm,bcm2711";
448 +
449 + #address-cells = <2>;
450 + #size-cells = <1>;
451 +
452 + interrupt-parent = <&gicv2>;
453 +
454 + reserved-memory {
455 + #address-cells = <2>;
456 + #size-cells = <1>;
457 + ranges;
458 +
459 + /*
460 + * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
461 + * that's not good enough for the BCM2711 as some devices can
462 + * only address the lower 1G of memory (ZONE_DMA).
463 + */
464 + linux,cma {
465 + compatible = "shared-dma-pool";
466 + size = <0x2000000>; /* 32MB */
467 + alloc-ranges = <0x0 0x00000000 0x40000000>;
468 + reusable;
469 + linux,cma-default;
470 + };
471 + };
472 +
473 +
474 soc {
475 - /delete-node/ v3d@7ec00000;
476 + /*
477 + * Defined ranges:
478 + * Common BCM283x peripherals
479 + * BCM2711-specific peripherals
480 + * ARM-local peripherals
481 + */
482 + ranges = <0x7e000000 0x0 0xfe000000 0x01800000>,
483 + <0x7c000000 0x0 0xfc000000 0x02000000>,
484 + <0x40000000 0x0 0xff800000 0x00800000>;
485 + /* Emulate a contiguous 30-bit address range for DMA */
486 + dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>;
487 +
488 + /*
489 + * This node is the provider for the enable-method for
490 + * bringing up secondary cores.
491 + */
492 + local_intc: local_intc@40000000 {
493 + compatible = "brcm,bcm2836-l1-intc";
494 + reg = <0x40000000 0x100>;
495 + };
496 +
497 + gicv2: interrupt-controller@40041000 {
498 + interrupt-controller;
499 + #interrupt-cells = <3>;
500 + compatible = "arm,gic-400";
501 + reg = <0x40041000 0x1000>,
502 + <0x40042000 0x2000>,
503 + <0x40044000 0x2000>,
504 + <0x40046000 0x2000>;
505 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
506 + IRQ_TYPE_LEVEL_HIGH)>;
507 + };
508 +
509 + dma: dma@7e007000 {
510 + compatible = "brcm,bcm2835-dma";
511 + reg = <0x7e007000 0xb00>;
512 + interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
513 + <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
514 + <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
515 + <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
516 + <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
517 + <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
518 + <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
519 + /* DMA lite 7 - 10 */
520 + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
521 + <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
522 + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
523 + <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
524 + interrupt-names = "dma0",
525 + "dma1",
526 + "dma2",
527 + "dma3",
528 + "dma4",
529 + "dma5",
530 + "dma6",
531 + "dma7",
532 + "dma8",
533 + "dma9",
534 + "dma10";
535 + #dma-cells = <1>;
536 + brcm,dma-channel-mask = <0x07f5>;
537 + };
538 +
539 + pm: watchdog@7e100000 {
540 + compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
541 + #power-domain-cells = <1>;
542 + #reset-cells = <1>;
543 + reg = <0x7e100000 0x114>,
544 + <0x7e00a000 0x24>,
545 + <0x7ec11000 0x20>;
546 + clocks = <&clocks BCM2835_CLOCK_V3D>,
547 + <&clocks BCM2835_CLOCK_PERI_IMAGE>,
548 + <&clocks BCM2835_CLOCK_H264>,
549 + <&clocks BCM2835_CLOCK_ISP>;
550 + clock-names = "v3d", "peri_image", "h264", "isp";
551 + system-power-controller;
552 + };
553 +
554 + rng@7e104000 {
555 + interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
556 +
557 + /* RNG is incompatible with brcm,bcm2835-rng */
558 + status = "disabled";
559 + };
560 +
561 + uart2: serial@7e201400 {
562 + compatible = "arm,pl011", "arm,primecell";
563 + reg = <0x7e201400 0x200>;
564 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
565 + clocks = <&clocks BCM2835_CLOCK_UART>,
566 + <&clocks BCM2835_CLOCK_VPU>;
567 + clock-names = "uartclk", "apb_pclk";
568 + arm,primecell-periphid = <0x00241011>;
569 + status = "disabled";
570 + };
571 +
572 + uart3: serial@7e201600 {
573 + compatible = "arm,pl011", "arm,primecell";
574 + reg = <0x7e201600 0x200>;
575 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
576 + clocks = <&clocks BCM2835_CLOCK_UART>,
577 + <&clocks BCM2835_CLOCK_VPU>;
578 + clock-names = "uartclk", "apb_pclk";
579 + arm,primecell-periphid = <0x00241011>;
580 + status = "disabled";
581 + };
582 +
583 + uart4: serial@7e201800 {
584 + compatible = "arm,pl011", "arm,primecell";
585 + reg = <0x7e201800 0x200>;
586 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
587 + clocks = <&clocks BCM2835_CLOCK_UART>,
588 + <&clocks BCM2835_CLOCK_VPU>;
589 + clock-names = "uartclk", "apb_pclk";
590 + arm,primecell-periphid = <0x00241011>;
591 + status = "disabled";
592 + };
593 +
594 + uart5: serial@7e201a00 {
595 + compatible = "arm,pl011", "arm,primecell";
596 + reg = <0x7e201a00 0x200>;
597 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
598 + clocks = <&clocks BCM2835_CLOCK_UART>,
599 + <&clocks BCM2835_CLOCK_VPU>;
600 + clock-names = "uartclk", "apb_pclk";
601 + arm,primecell-periphid = <0x00241011>;
602 + status = "disabled";
603 + };
604 +
605 + spi3: spi@7e204600 {
606 + compatible = "brcm,bcm2835-spi";
607 + reg = <0x7e204600 0x0200>;
608 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
609 + clocks = <&clocks BCM2835_CLOCK_VPU>;
610 + #address-cells = <1>;
611 + #size-cells = <0>;
612 + status = "disabled";
613 + };
614 +
615 + spi4: spi@7e204800 {
616 + compatible = "brcm,bcm2835-spi";
617 + reg = <0x7e204800 0x0200>;
618 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
619 + clocks = <&clocks BCM2835_CLOCK_VPU>;
620 + #address-cells = <1>;
621 + #size-cells = <0>;
622 + status = "disabled";
623 + };
624 +
625 + spi5: spi@7e204a00 {
626 + compatible = "brcm,bcm2835-spi";
627 + reg = <0x7e204a00 0x0200>;
628 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
629 + clocks = <&clocks BCM2835_CLOCK_VPU>;
630 + #address-cells = <1>;
631 + #size-cells = <0>;
632 + status = "disabled";
633 + };
634 +
635 + spi6: spi@7e204c00 {
636 + compatible = "brcm,bcm2835-spi";
637 + reg = <0x7e204c00 0x0200>;
638 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
639 + clocks = <&clocks BCM2835_CLOCK_VPU>;
640 + #address-cells = <1>;
641 + #size-cells = <0>;
642 + status = "disabled";
643 + };
644 +
645 + i2c3: i2c@7e205600 {
646 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
647 + reg = <0x7e205600 0x200>;
648 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
649 + clocks = <&clocks BCM2835_CLOCK_VPU>;
650 + #address-cells = <1>;
651 + #size-cells = <0>;
652 + status = "disabled";
653 + };
654 +
655 + i2c4: i2c@7e205800 {
656 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
657 + reg = <0x7e205800 0x200>;
658 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
659 + clocks = <&clocks BCM2835_CLOCK_VPU>;
660 + #address-cells = <1>;
661 + #size-cells = <0>;
662 + status = "disabled";
663 + };
664 +
665 + i2c5: i2c@7e205a00 {
666 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
667 + reg = <0x7e205a00 0x200>;
668 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
669 + clocks = <&clocks BCM2835_CLOCK_VPU>;
670 + #address-cells = <1>;
671 + #size-cells = <0>;
672 + status = "disabled";
673 + };
674 +
675 + i2c6: i2c@7e205c00 {
676 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
677 + reg = <0x7e205c00 0x200>;
678 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
679 + clocks = <&clocks BCM2835_CLOCK_VPU>;
680 + #address-cells = <1>;
681 + #size-cells = <0>;
682 + status = "disabled";
683 + };
684 +
685 + pwm1: pwm@7e20c800 {
686 + compatible = "brcm,bcm2835-pwm";
687 + reg = <0x7e20c800 0x28>;
688 + clocks = <&clocks BCM2835_CLOCK_PWM>;
689 + assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
690 + assigned-clock-rates = <10000000>;
691 + #pwm-cells = <2>;
692 + status = "disabled";
693 + };
694 +
695 + emmc2: emmc2@7e340000 {
696 + compatible = "brcm,bcm2711-emmc2";
697 + reg = <0x7e340000 0x100>;
698 + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
699 + clocks = <&clocks BCM2711_CLOCK_EMMC2>;
700 + status = "disabled";
701 + };
702 +
703 + hvs@7e400000 {
704 + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
705 + };
706 + };
707 +
708 + arm-pmu {
709 + compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
710 + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
711 + <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
712 + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
713 + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
714 + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
715 + };
716 +
717 + timer {
718 + compatible = "arm,armv8-timer";
719 + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
720 + IRQ_TYPE_LEVEL_LOW)>,
721 + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
722 + IRQ_TYPE_LEVEL_LOW)>,
723 + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
724 + IRQ_TYPE_LEVEL_LOW)>,
725 + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
726 + IRQ_TYPE_LEVEL_LOW)>;
727 + /* This only applies to the ARMv7 stub */
728 + arm,cpu-registers-not-fw-configured;
729 + };
730 +
731 + cpus: cpus {
732 + #address-cells = <1>;
733 + #size-cells = <0>;
734 + enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
735 +
736 + cpu0: cpu@0 {
737 + device_type = "cpu";
738 + compatible = "arm,cortex-a72";
739 + reg = <0>;
740 + enable-method = "spin-table";
741 + cpu-release-addr = <0x0 0x000000d8>;
742 + };
743 +
744 + cpu1: cpu@1 {
745 + device_type = "cpu";
746 + compatible = "arm,cortex-a72";
747 + reg = <1>;
748 + enable-method = "spin-table";
749 + cpu-release-addr = <0x0 0x000000e0>;
750 + };
751 +
752 + cpu2: cpu@2 {
753 + device_type = "cpu";
754 + compatible = "arm,cortex-a72";
755 + reg = <2>;
756 + enable-method = "spin-table";
757 + cpu-release-addr = <0x0 0x000000e8>;
758 + };
759 +
760 + cpu3: cpu@3 {
761 + device_type = "cpu";
762 + compatible = "arm,cortex-a72";
763 + reg = <3>;
764 + enable-method = "spin-table";
765 + cpu-release-addr = <0x0 0x000000f0>;
766 + };
767 };
768
769 - __overrides__ {
770 - arm_freq;
771 + scb {
772 + compatible = "simple-bus";
773 + #address-cells = <2>;
774 + #size-cells = <1>;
775 +
776 + ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>;
777 +
778 + genet: ethernet@7d580000 {
779 + compatible = "brcm,bcm2711-genet-v5";
780 + reg = <0x0 0x7d580000 0x10000>;
781 + #address-cells = <0x1>;
782 + #size-cells = <0x1>;
783 + interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
784 + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
785 + status = "disabled";
786 +
787 + genet_mdio: mdio@e14 {
788 + compatible = "brcm,genet-mdio-v5";
789 + reg = <0xe14 0x8>;
790 + reg-names = "mdio";
791 + #address-cells = <0x0>;
792 + #size-cells = <0x1>;
793 + };
794 + };
795 };
796 };
797
798 -&v3d {
799 - status = "disabled";
800 +&clk_osc {
801 + clock-frequency = <54000000>;
802 };
803
804 -&firmwarekms {
805 - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
806 +&clocks {
807 + compatible = "brcm,bcm2711-cprman";
808 };
809
810 -&smi {
811 - interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
812 +&cpu_thermal {
813 + coefficients = <(-487) 410040>;
814 };
815
816 -&mmc {
817 - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
818 +&dsi0 {
819 + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
820 +};
821 +
822 +&dsi1 {
823 + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
824 +};
825 +
826 +&gpio {
827 + compatible = "brcm,bcm2711-gpio";
828 + interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
829 + <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
830 + <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
831 + <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
832 +
833 + gpclk0_gpio49: gpclk0_gpio49 {
834 + pin-gpclk {
835 + pins = "gpio49";
836 + function = "alt1";
837 + bias-disable;
838 + };
839 + };
840 + gpclk1_gpio50: gpclk1_gpio50 {
841 + pin-gpclk {
842 + pins = "gpio50";
843 + function = "alt1";
844 + bias-disable;
845 + };
846 + };
847 + gpclk2_gpio51: gpclk2_gpio51 {
848 + pin-gpclk {
849 + pins = "gpio51";
850 + function = "alt1";
851 + bias-disable;
852 + };
853 + };
854 +
855 + i2c0_gpio46: i2c0_gpio46 {
856 + pin-sda {
857 + function = "alt0";
858 + pins = "gpio46";
859 + bias-pull-up;
860 + };
861 + pin-scl {
862 + function = "alt0";
863 + pins = "gpio47";
864 + bias-disable;
865 + };
866 + };
867 + i2c1_gpio46: i2c1_gpio46 {
868 + pin-sda {
869 + function = "alt1";
870 + pins = "gpio46";
871 + bias-pull-up;
872 + };
873 + pin-scl {
874 + function = "alt1";
875 + pins = "gpio47";
876 + bias-disable;
877 + };
878 + };
879 + i2c3_gpio2: i2c3_gpio2 {
880 + pin-sda {
881 + function = "alt5";
882 + pins = "gpio2";
883 + bias-pull-up;
884 + };
885 + pin-scl {
886 + function = "alt5";
887 + pins = "gpio3";
888 + bias-disable;
889 + };
890 + };
891 + i2c3_gpio4: i2c3_gpio4 {
892 + pin-sda {
893 + function = "alt5";
894 + pins = "gpio4";
895 + bias-pull-up;
896 + };
897 + pin-scl {
898 + function = "alt5";
899 + pins = "gpio5";
900 + bias-disable;
901 + };
902 + };
903 + i2c4_gpio6: i2c4_gpio6 {
904 + pin-sda {
905 + function = "alt5";
906 + pins = "gpio6";
907 + bias-pull-up;
908 + };
909 + pin-scl {
910 + function = "alt5";
911 + pins = "gpio7";
912 + bias-disable;
913 + };
914 + };
915 + i2c4_gpio8: i2c4_gpio8 {
916 + pin-sda {
917 + function = "alt5";
918 + pins = "gpio8";
919 + bias-pull-up;
920 + };
921 + pin-scl {
922 + function = "alt5";
923 + pins = "gpio9";
924 + bias-disable;
925 + };
926 + };
927 + i2c5_gpio10: i2c5_gpio10 {
928 + pin-sda {
929 + function = "alt5";
930 + pins = "gpio10";
931 + bias-pull-up;
932 + };
933 + pin-scl {
934 + function = "alt5";
935 + pins = "gpio11";
936 + bias-disable;
937 + };
938 + };
939 + i2c5_gpio12: i2c5_gpio12 {
940 + pin-sda {
941 + function = "alt5";
942 + pins = "gpio12";
943 + bias-pull-up;
944 + };
945 + pin-scl {
946 + function = "alt5";
947 + pins = "gpio13";
948 + bias-disable;
949 + };
950 + };
951 + i2c6_gpio0: i2c6_gpio0 {
952 + pin-sda {
953 + function = "alt5";
954 + pins = "gpio0";
955 + bias-pull-up;
956 + };
957 + pin-scl {
958 + function = "alt5";
959 + pins = "gpio1";
960 + bias-disable;
961 + };
962 + };
963 + i2c6_gpio22: i2c6_gpio22 {
964 + pin-sda {
965 + function = "alt5";
966 + pins = "gpio22";
967 + bias-pull-up;
968 + };
969 + pin-scl {
970 + function = "alt5";
971 + pins = "gpio23";
972 + bias-disable;
973 + };
974 + };
975 + i2c_slave_gpio8: i2c_slave_gpio8 {
976 + pins-i2c-slave {
977 + pins = "gpio8",
978 + "gpio9",
979 + "gpio10",
980 + "gpio11";
981 + function = "alt3";
982 + };
983 + };
984 +
985 + jtag_gpio48: jtag_gpio48 {
986 + pins-jtag {
987 + pins = "gpio48",
988 + "gpio49",
989 + "gpio50",
990 + "gpio51",
991 + "gpio52",
992 + "gpio53";
993 + function = "alt4";
994 + };
995 + };
996 +
997 + mii_gpio28: mii_gpio28 {
998 + pins-mii {
999 + pins = "gpio28",
1000 + "gpio29",
1001 + "gpio30",
1002 + "gpio31";
1003 + function = "alt4";
1004 + };
1005 + };
1006 + mii_gpio36: mii_gpio36 {
1007 + pins-mii {
1008 + pins = "gpio36",
1009 + "gpio37",
1010 + "gpio38",
1011 + "gpio39";
1012 + function = "alt5";
1013 + };
1014 + };
1015 +
1016 + pcm_gpio50: pcm_gpio50 {
1017 + pins-pcm {
1018 + pins = "gpio50",
1019 + "gpio51",
1020 + "gpio52",
1021 + "gpio53";
1022 + function = "alt2";
1023 + };
1024 + };
1025 +
1026 + pwm0_0_gpio12: pwm0_0_gpio12 {
1027 + pin-pwm {
1028 + pins = "gpio12";
1029 + function = "alt0";
1030 + bias-disable;
1031 + };
1032 + };
1033 + pwm0_0_gpio18: pwm0_0_gpio18 {
1034 + pin-pwm {
1035 + pins = "gpio18";
1036 + function = "alt5";
1037 + bias-disable;
1038 + };
1039 + };
1040 + pwm1_0_gpio40: pwm1_0_gpio40 {
1041 + pin-pwm {
1042 + pins = "gpio40";
1043 + function = "alt0";
1044 + bias-disable;
1045 + };
1046 + };
1047 + pwm0_1_gpio13: pwm0_1_gpio13 {
1048 + pin-pwm {
1049 + pins = "gpio13";
1050 + function = "alt0";
1051 + bias-disable;
1052 + };
1053 + };
1054 + pwm0_1_gpio19: pwm0_1_gpio19 {
1055 + pin-pwm {
1056 + pins = "gpio19";
1057 + function = "alt5";
1058 + bias-disable;
1059 + };
1060 + };
1061 + pwm1_1_gpio41: pwm1_1_gpio41 {
1062 + pin-pwm {
1063 + pins = "gpio41";
1064 + function = "alt0";
1065 + bias-disable;
1066 + };
1067 + };
1068 + pwm0_1_gpio45: pwm0_1_gpio45 {
1069 + pin-pwm {
1070 + pins = "gpio45";
1071 + function = "alt0";
1072 + bias-disable;
1073 + };
1074 + };
1075 + pwm0_0_gpio52: pwm0_0_gpio52 {
1076 + pin-pwm {
1077 + pins = "gpio52";
1078 + function = "alt1";
1079 + bias-disable;
1080 + };
1081 + };
1082 + pwm0_1_gpio53: pwm0_1_gpio53 {
1083 + pin-pwm {
1084 + pins = "gpio53";
1085 + function = "alt1";
1086 + bias-disable;
1087 + };
1088 + };
1089 +
1090 + rgmii_gpio35: rgmii_gpio35 {
1091 + pin-start-stop {
1092 + pins = "gpio35";
1093 + function = "alt4";
1094 + };
1095 + pin-rx-ok {
1096 + pins = "gpio36";
1097 + function = "alt4";
1098 + };
1099 + };
1100 + rgmii_irq_gpio34: rgmii_irq_gpio34 {
1101 + pin-irq {
1102 + pins = "gpio34";
1103 + function = "alt5";
1104 + };
1105 + };
1106 + rgmii_irq_gpio39: rgmii_irq_gpio39 {
1107 + pin-irq {
1108 + pins = "gpio39";
1109 + function = "alt4";
1110 + };
1111 + };
1112 + rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
1113 + pins-mdio {
1114 + pins = "gpio28",
1115 + "gpio29";
1116 + function = "alt5";
1117 + };
1118 + };
1119 + rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
1120 + pins-mdio {
1121 + pins = "gpio37",
1122 + "gpio38";
1123 + function = "alt4";
1124 + };
1125 + };
1126 +
1127 + spi0_gpio46: spi0_gpio46 {
1128 + pins-spi {
1129 + pins = "gpio46",
1130 + "gpio47",
1131 + "gpio48",
1132 + "gpio49";
1133 + function = "alt2";
1134 + };
1135 + };
1136 + spi2_gpio46: spi2_gpio46 {
1137 + pins-spi {
1138 + pins = "gpio46",
1139 + "gpio47",
1140 + "gpio48",
1141 + "gpio49",
1142 + "gpio50";
1143 + function = "alt5";
1144 + };
1145 + };
1146 + spi3_gpio0: spi3_gpio0 {
1147 + pins-spi {
1148 + pins = "gpio0",
1149 + "gpio1",
1150 + "gpio2",
1151 + "gpio3";
1152 + function = "alt3";
1153 + };
1154 + };
1155 + spi4_gpio4: spi4_gpio4 {
1156 + pins-spi {
1157 + pins = "gpio4",
1158 + "gpio5",
1159 + "gpio6",
1160 + "gpio7";
1161 + function = "alt3";
1162 + };
1163 + };
1164 + spi5_gpio12: spi5_gpio12 {
1165 + pins-spi {
1166 + pins = "gpio12",
1167 + "gpio13",
1168 + "gpio14",
1169 + "gpio15";
1170 + function = "alt3";
1171 + };
1172 + };
1173 + spi6_gpio18: spi6_gpio18 {
1174 + pins-spi {
1175 + pins = "gpio18",
1176 + "gpio19",
1177 + "gpio20",
1178 + "gpio21";
1179 + function = "alt3";
1180 + };
1181 + };
1182 +
1183 + uart2_gpio0: uart2_gpio0 {
1184 + pin-tx {
1185 + pins = "gpio0";
1186 + function = "alt4";
1187 + bias-disable;
1188 + };
1189 + pin-rx {
1190 + pins = "gpio1";
1191 + function = "alt4";
1192 + bias-pull-up;
1193 + };
1194 + };
1195 + uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
1196 + pin-cts {
1197 + pins = "gpio2";
1198 + function = "alt4";
1199 + bias-pull-up;
1200 + };
1201 + pin-rts {
1202 + pins = "gpio3";
1203 + function = "alt4";
1204 + bias-disable;
1205 + };
1206 + };
1207 + uart3_gpio4: uart3_gpio4 {
1208 + pin-tx {
1209 + pins = "gpio4";
1210 + function = "alt4";
1211 + bias-disable;
1212 + };
1213 + pin-rx {
1214 + pins = "gpio5";
1215 + function = "alt4";
1216 + bias-pull-up;
1217 + };
1218 + };
1219 + uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
1220 + pin-cts {
1221 + pins = "gpio6";
1222 + function = "alt4";
1223 + bias-pull-up;
1224 + };
1225 + pin-rts {
1226 + pins = "gpio7";
1227 + function = "alt4";
1228 + bias-disable;
1229 + };
1230 + };
1231 + uart4_gpio8: uart4_gpio8 {
1232 + pin-tx {
1233 + pins = "gpio8";
1234 + function = "alt4";
1235 + bias-disable;
1236 + };
1237 + pin-rx {
1238 + pins = "gpio9";
1239 + function = "alt4";
1240 + bias-pull-up;
1241 + };
1242 + };
1243 + uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
1244 + pin-cts {
1245 + pins = "gpio10";
1246 + function = "alt4";
1247 + bias-pull-up;
1248 + };
1249 + pin-rts {
1250 + pins = "gpio11";
1251 + function = "alt4";
1252 + bias-disable;
1253 + };
1254 + };
1255 + uart5_gpio12: uart5_gpio12 {
1256 + pin-tx {
1257 + pins = "gpio12";
1258 + function = "alt4";
1259 + bias-disable;
1260 + };
1261 + pin-rx {
1262 + pins = "gpio13";
1263 + function = "alt4";
1264 + bias-pull-up;
1265 + };
1266 + };
1267 + uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
1268 + pin-cts {
1269 + pins = "gpio14";
1270 + function = "alt4";
1271 + bias-pull-up;
1272 + };
1273 + pin-rts {
1274 + pins = "gpio15";
1275 + function = "alt4";
1276 + bias-disable;
1277 + };
1278 + };
1279 };
1280
1281 -&mmcnr {
1282 +&i2c0 {
1283 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
1284 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1285 +};
1286 +
1287 +&i2c1 {
1288 + compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
1289 + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
1290 +};
1291 +
1292 +&mailbox {
1293 + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
1294 +};
1295 +
1296 +&sdhci {
1297 interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
1298 };
1299
1300 +&sdhost {
1301 + interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
1302 +};
1303 +
1304 +&spi {
1305 + interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1306 +};
1307 +
1308 +&spi1 {
1309 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
1310 +};
1311 +
1312 +&spi2 {
1313 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
1314 +};
1315 +
1316 +&system_timer {
1317 + interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
1318 + <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
1319 + <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
1320 + <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
1321 +};
1322 +
1323 +&txp {
1324 + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
1325 +};
1326 +
1327 +&uart0 {
1328 + interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
1329 +};
1330 +
1331 +&uart1 {
1332 + interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
1333 +};
1334 +
1335 &usb {
1336 - reg = <0x7e980000 0x10000>,
1337 - <0x7e00b200 0x200>;
1338 - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
1339 - <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
1340 + interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
1341 };
1342
1343 -&gpio {
1344 - interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
1345 - <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
1346 +&vec {
1347 + interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
1348 };
1349 --- a/arch/arm/boot/dts/bcm2835-common.dtsi
1350 +++ b/arch/arm/boot/dts/bcm2835-common.dtsi
1351 @@ -8,6 +8,47 @@
1352 interrupt-parent = <&intc>;
1353
1354 soc {
1355 + dma: dma@7e007000 {
1356 + compatible = "brcm,bcm2835-dma";
1357 + reg = <0x7e007000 0xf00>;
1358 + interrupts = <1 16>,
1359 + <1 17>,
1360 + <1 18>,
1361 + <1 19>,
1362 + <1 20>,
1363 + <1 21>,
1364 + <1 22>,
1365 + <1 23>,
1366 + <1 24>,
1367 + <1 25>,
1368 + <1 26>,
1369 + /* dma channel 11-14 share one irq */
1370 + <1 27>,
1371 + <1 27>,
1372 + <1 27>,
1373 + <1 27>,
1374 + /* unused shared irq for all channels */
1375 + <1 28>;
1376 + interrupt-names = "dma0",
1377 + "dma1",
1378 + "dma2",
1379 + "dma3",
1380 + "dma4",
1381 + "dma5",
1382 + "dma6",
1383 + "dma7",
1384 + "dma8",
1385 + "dma9",
1386 + "dma10",
1387 + "dma11",
1388 + "dma12",
1389 + "dma13",
1390 + "dma14",
1391 + "dma-shared-all";
1392 + #dma-cells = <1>;
1393 + brcm,dma-channel-mask = <0x7f35>;
1394 + };
1395 +
1396 intc: interrupt-controller@7e00b200 {
1397 compatible = "brcm,bcm2835-armctrl-ic";
1398 reg = <0x7e00b200 0x200>;
1399 @@ -15,6 +56,20 @@
1400 #interrupt-cells = <2>;
1401 };
1402
1403 + pm: watchdog@7e100000 {
1404 + compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
1405 + #power-domain-cells = <1>;
1406 + #reset-cells = <1>;
1407 + reg = <0x7e100000 0x114>,
1408 + <0x7e00a000 0x24>;
1409 + clocks = <&clocks BCM2835_CLOCK_V3D>,
1410 + <&clocks BCM2835_CLOCK_PERI_IMAGE>,
1411 + <&clocks BCM2835_CLOCK_H264>,
1412 + <&clocks BCM2835_CLOCK_ISP>;
1413 + clock-names = "v3d", "peri_image", "h264", "isp";
1414 + system-power-controller;
1415 + };
1416 +
1417 pixelvalve@7e206000 {
1418 compatible = "brcm,bcm2835-pixelvalve0";
1419 reg = <0x7e206000 0x100>;
1420 @@ -35,21 +90,53 @@
1421 status = "disabled";
1422 };
1423
1424 + i2c2: i2c@7e805000 {
1425 + compatible = "brcm,bcm2835-i2c";
1426 + reg = <0x7e805000 0x1000>;
1427 + interrupts = <2 21>;
1428 + clocks = <&clocks BCM2835_CLOCK_VPU>;
1429 + #address-cells = <1>;
1430 + #size-cells = <0>;
1431 + status = "okay";
1432 + };
1433 +
1434 pixelvalve@7e807000 {
1435 compatible = "brcm,bcm2835-pixelvalve2";
1436 reg = <0x7e807000 0x100>;
1437 interrupts = <2 10>; /* pixelvalve */
1438 };
1439
1440 + hdmi: hdmi@7e902000 {
1441 + compatible = "brcm,bcm2835-hdmi";
1442 + reg = <0x7e902000 0x600>,
1443 + <0x7e808000 0x100>;
1444 + interrupts = <2 8>, <2 9>;
1445 + ddc = <&i2c2>;
1446 + clocks = <&clocks BCM2835_PLLH_PIX>,
1447 + <&clocks BCM2835_CLOCK_HSM>;
1448 + clock-names = "pixel", "hdmi";
1449 + dmas = <&dma 17>;
1450 + dma-names = "audio-rx";
1451 + status = "disabled";
1452 + };
1453 +
1454 v3d: v3d@7ec00000 {
1455 compatible = "brcm,bcm2835-v3d";
1456 reg = <0x7ec00000 0x1000>;
1457 interrupts = <1 10>;
1458 power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
1459 };
1460 +
1461 + vc4: gpu {
1462 + compatible = "brcm,bcm2835-vc4";
1463 + };
1464 };
1465 };
1466
1467 +&cpu_thermal {
1468 + thermal-sensors = <&thermal>;
1469 +};
1470 +
1471 &gpio {
1472 i2c_slave_gpio18: i2c_slave_gpio18 {
1473 brcm,pins = <18 19 20 21>;
1474 @@ -60,4 +147,48 @@
1475 brcm,pins = <4 5 6 12 13>;
1476 brcm,function = <BCM2835_FSEL_ALT5>;
1477 };
1478 +
1479 + pwm0_gpio12: pwm0_gpio12 {
1480 + brcm,pins = <12>;
1481 + brcm,function = <BCM2835_FSEL_ALT0>;
1482 + };
1483 + pwm0_gpio18: pwm0_gpio18 {
1484 + brcm,pins = <18>;
1485 + brcm,function = <BCM2835_FSEL_ALT5>;
1486 + };
1487 + pwm0_gpio40: pwm0_gpio40 {
1488 + brcm,pins = <40>;
1489 + brcm,function = <BCM2835_FSEL_ALT0>;
1490 + };
1491 + pwm1_gpio13: pwm1_gpio13 {
1492 + brcm,pins = <13>;
1493 + brcm,function = <BCM2835_FSEL_ALT0>;
1494 + };
1495 + pwm1_gpio19: pwm1_gpio19 {
1496 + brcm,pins = <19>;
1497 + brcm,function = <BCM2835_FSEL_ALT5>;
1498 + };
1499 + pwm1_gpio41: pwm1_gpio41 {
1500 + brcm,pins = <41>;
1501 + brcm,function = <BCM2835_FSEL_ALT0>;
1502 + };
1503 + pwm1_gpio45: pwm1_gpio45 {
1504 + brcm,pins = <45>;
1505 + brcm,function = <BCM2835_FSEL_ALT0>;
1506 + };
1507 +};
1508 +
1509 +&i2s {
1510 + dmas = <&dma 2>, <&dma 3>;
1511 + dma-names = "tx", "rx";
1512 +};
1513 +
1514 +&sdhost {
1515 + dmas = <&dma 13>;
1516 + dma-names = "rx-tx";
1517 +};
1518 +
1519 +&spi {
1520 + dmas = <&dma 6>, <&dma 7>;
1521 + dma-names = "tx", "rx";
1522 };
1523 --- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
1524 +++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
1525 @@ -3,7 +3,6 @@
1526 #include "bcm2835.dtsi"
1527 #include "bcm2835-rpi.dtsi"
1528 #include "bcm283x-rpi-usb-host.dtsi"
1529 -#include "bcm283x-rpi-csi1-2lane.dtsi"
1530
1531 / {
1532 compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
1533 --- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
1534 +++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
1535 @@ -3,7 +3,6 @@
1536 #include "bcm2835.dtsi"
1537 #include "bcm2835-rpi.dtsi"
1538 #include "bcm283x-rpi-usb-host.dtsi"
1539 -#include "bcm283x-rpi-csi1-2lane.dtsi"
1540
1541 / {
1542 compatible = "raspberrypi,model-a", "brcm,bcm2835";
1543 --- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
1544 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
1545 @@ -4,7 +4,6 @@
1546 #include "bcm2835-rpi.dtsi"
1547 #include "bcm283x-rpi-smsc9514.dtsi"
1548 #include "bcm283x-rpi-usb-host.dtsi"
1549 -#include "bcm283x-rpi-csi1-2lane.dtsi"
1550
1551 / {
1552 compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
1553 --- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
1554 +++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
1555 @@ -4,7 +4,6 @@
1556 #include "bcm2835-rpi.dtsi"
1557 #include "bcm283x-rpi-smsc9512.dtsi"
1558 #include "bcm283x-rpi-usb-host.dtsi"
1559 -#include "bcm283x-rpi-csi1-2lane.dtsi"
1560
1561 / {
1562 compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";
1563 --- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
1564 +++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
1565 @@ -4,7 +4,6 @@
1566 #include "bcm2835-rpi.dtsi"
1567 #include "bcm283x-rpi-smsc9512.dtsi"
1568 #include "bcm283x-rpi-usb-host.dtsi"
1569 -#include "bcm283x-rpi-csi1-2lane.dtsi"
1570
1571 / {
1572 compatible = "raspberrypi,model-b", "brcm,bcm2835";
1573 --- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
1574 +++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
1575 @@ -7,7 +7,6 @@
1576 #include "bcm2835.dtsi"
1577 #include "bcm2835-rpi.dtsi"
1578 #include "bcm283x-rpi-usb-otg.dtsi"
1579 -#include "bcm283x-rpi-csi1-2lane.dtsi"
1580
1581 / {
1582 compatible = "raspberrypi,model-zero", "brcm,bcm2835";
1583 --- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
1584 +++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
1585 @@ -29,22 +29,6 @@
1586 interrupts = <0 2>;
1587 };
1588 };
1589 -
1590 - vdd_3v3_reg: fixedregulator_3v3 {
1591 - compatible = "regulator-fixed";
1592 - regulator-name = "3v3";
1593 - regulator-min-microvolt = <3300000>;
1594 - regulator-max-microvolt = <3300000>;
1595 - regulator-always-on;
1596 - };
1597 -
1598 - vdd_5v0_reg: fixedregulator_5v0 {
1599 - compatible = "regulator-fixed";
1600 - regulator-name = "5v0";
1601 - regulator-min-microvolt = <5000000>;
1602 - regulator-max-microvolt = <5000000>;
1603 - regulator-always-on;
1604 - };
1605 };
1606
1607 &gpio {
1608 @@ -75,23 +59,10 @@
1609 clock-frequency = <100000>;
1610 };
1611
1612 -&i2c2 {
1613 - status = "okay";
1614 -};
1615 -
1616 &usb {
1617 power-domains = <&power RPI_POWER_DOMAIN_USB>;
1618 };
1619
1620 -&hdmi {
1621 - power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
1622 - status = "okay";
1623 -};
1624 -
1625 -&v3d {
1626 - power-domains = <&power RPI_POWER_DOMAIN_V3D>;
1627 -};
1628 -
1629 &vec {
1630 power-domains = <&power RPI_POWER_DOMAIN_VEC>;
1631 status = "okay";
1632 @@ -104,11 +75,3 @@
1633 &dsi1 {
1634 power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
1635 };
1636 -
1637 -&csi0 {
1638 - power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
1639 -};
1640 -
1641 -&csi1 {
1642 - power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
1643 -};
1644 --- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
1645 +++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
1646 @@ -4,7 +4,6 @@
1647 #include "bcm2836-rpi.dtsi"
1648 #include "bcm283x-rpi-smsc9514.dtsi"
1649 #include "bcm283x-rpi-usb-host.dtsi"
1650 -#include "bcm283x-rpi-csi1-2lane.dtsi"
1651
1652 / {
1653 compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
1654 --- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
1655 +++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
1656 @@ -4,7 +4,6 @@
1657 #include "bcm2836-rpi.dtsi"
1658 #include "bcm283x-rpi-smsc9514.dtsi"
1659 #include "bcm283x-rpi-usb-host.dtsi"
1660 -#include "bcm283x-rpi-csi1-2lane.dtsi"
1661
1662 / {
1663 compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
1664 --- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
1665 +++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
1666 @@ -29,9 +29,6 @@
1667 #size-cells = <0x0>;
1668 eth_phy: ethernet-phy@1 {
1669 reg = <1>;
1670 - microchip,eee-enabled;
1671 - microchip,tx-lpi-timer = <600>; /* non-aggressive*/
1672 - microchip,downshift-after = <2>;
1673 microchip,led-modes = <
1674 LAN78XX_LINK_1000_ACTIVITY
1675 LAN78XX_LINK_10_100_ACTIVITY
1676 @@ -42,15 +39,3 @@
1677 };
1678 };
1679 };
1680 -
1681 -
1682 -/ {
1683 - __overrides__ {
1684 - eee = <&eth_phy>,"microchip,eee-enabled?";
1685 - tx_lpi_timer = <&eth_phy>,"microchip,tx-lpi-timer:0";
1686 - eth_led0 = <&eth_phy>,"microchip,led-modes:0";
1687 - eth_led1 = <&eth_phy>,"microchip,led-modes:4";
1688 - eth_downshift_after = <&eth_phy>,"microchip,downshift-after:0";
1689 - eth_max_speed = <&eth_phy>,"max-speed:0";
1690 - };
1691 -};
1692 --- a/arch/arm/boot/dts/bcm283x.dtsi
1693 +++ b/arch/arm/boot/dts/bcm283x.dtsi
1694 @@ -35,8 +35,6 @@
1695 polling-delay-passive = <0>;
1696 polling-delay = <1000>;
1697
1698 - thermal-sensors = <&thermal>;
1699 -
1700 trips {
1701 cpu-crit {
1702 temperature = <90000>;
1703 @@ -72,61 +70,6 @@
1704 interrupts = <1 11>;
1705 };
1706
1707 - dma: dma@7e007000 {
1708 - compatible = "brcm,bcm2835-dma";
1709 - reg = <0x7e007000 0xf00>;
1710 - interrupts = <1 16>,
1711 - <1 17>,
1712 - <1 18>,
1713 - <1 19>,
1714 - <1 20>,
1715 - <1 21>,
1716 - <1 22>,
1717 - <1 23>,
1718 - <1 24>,
1719 - <1 25>,
1720 - <1 26>,
1721 - /* dma channel 11-14 share one irq */
1722 - <1 27>,
1723 - <1 27>,
1724 - <1 27>,
1725 - <1 27>,
1726 - /* unused shared irq for all channels */
1727 - <1 28>;
1728 - interrupt-names = "dma0",
1729 - "dma1",
1730 - "dma2",
1731 - "dma3",
1732 - "dma4",
1733 - "dma5",
1734 - "dma6",
1735 - "dma7",
1736 - "dma8",
1737 - "dma9",
1738 - "dma10",
1739 - "dma11",
1740 - "dma12",
1741 - "dma13",
1742 - "dma14",
1743 - "dma-shared-all";
1744 - #dma-cells = <1>;
1745 - brcm,dma-channel-mask = <0x7f35>;
1746 - };
1747 -
1748 - pm: watchdog@7e100000 {
1749 - compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
1750 - #power-domain-cells = <1>;
1751 - #reset-cells = <1>;
1752 - reg = <0x7e100000 0x114>,
1753 - <0x7e00a000 0x24>;
1754 - clocks = <&clocks BCM2835_CLOCK_V3D>,
1755 - <&clocks BCM2835_CLOCK_PERI_IMAGE>,
1756 - <&clocks BCM2835_CLOCK_H264>,
1757 - <&clocks BCM2835_CLOCK_ISP>;
1758 - clock-names = "v3d", "peri_image", "h264", "isp";
1759 - system-power-controller;
1760 - };
1761 -
1762 clocks: cprman@7e101000 {
1763 compatible = "brcm,bcm2835-cprman";
1764 #clock-cells = <1>;
1765 @@ -141,7 +84,7 @@
1766 <&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
1767 };
1768
1769 - rng: rng@7e104000 {
1770 + rng@7e104000 {
1771 compatible = "brcm,bcm2835-rng";
1772 reg = <0x7e104000 0x10>;
1773 interrupts = <2 29>;
1774 @@ -269,35 +212,6 @@
1775 brcm,function = <BCM2835_FSEL_ALT2>;
1776 };
1777
1778 - pwm0_gpio12: pwm0_gpio12 {
1779 - brcm,pins = <12>;
1780 - brcm,function = <BCM2835_FSEL_ALT0>;
1781 - };
1782 - pwm0_gpio18: pwm0_gpio18 {
1783 - brcm,pins = <18>;
1784 - brcm,function = <BCM2835_FSEL_ALT5>;
1785 - };
1786 - pwm0_gpio40: pwm0_gpio40 {
1787 - brcm,pins = <40>;
1788 - brcm,function = <BCM2835_FSEL_ALT0>;
1789 - };
1790 - pwm1_gpio13: pwm1_gpio13 {
1791 - brcm,pins = <13>;
1792 - brcm,function = <BCM2835_FSEL_ALT0>;
1793 - };
1794 - pwm1_gpio19: pwm1_gpio19 {
1795 - brcm,pins = <19>;
1796 - brcm,function = <BCM2835_FSEL_ALT5>;
1797 - };
1798 - pwm1_gpio41: pwm1_gpio41 {
1799 - brcm,pins = <41>;
1800 - brcm,function = <BCM2835_FSEL_ALT0>;
1801 - };
1802 - pwm1_gpio45: pwm1_gpio45 {
1803 - brcm,pins = <45>;
1804 - brcm,function = <BCM2835_FSEL_ALT0>;
1805 - };
1806 -
1807 sdhost_gpio48: sdhost_gpio48 {
1808 brcm,pins = <48 49 50 51 52 53>;
1809 brcm,function = <BCM2835_FSEL_ALT0>;
1810 @@ -379,7 +293,7 @@
1811 };
1812
1813 uart0: serial@7e201000 {
1814 - compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
1815 + compatible = "arm,pl011", "arm,primecell";
1816 reg = <0x7e201000 0x200>;
1817 interrupts = <2 25>;
1818 clocks = <&clocks BCM2835_CLOCK_UART>,
1819 @@ -393,8 +307,6 @@
1820 reg = <0x7e202000 0x100>;
1821 interrupts = <2 24>;
1822 clocks = <&clocks BCM2835_CLOCK_VPU>;
1823 - dmas = <&dma (13|(1<<29))>;
1824 - dma-names = "rx-tx";
1825 status = "disabled";
1826 };
1827
1828 @@ -402,10 +314,6 @@
1829 compatible = "brcm,bcm2835-i2s";
1830 reg = <0x7e203000 0x24>;
1831 clocks = <&clocks BCM2835_CLOCK_PCM>;
1832 -
1833 - dmas = <&dma 2>,
1834 - <&dma 3>;
1835 - dma-names = "tx", "rx";
1836 status = "disabled";
1837 };
1838
1839 @@ -414,8 +322,6 @@
1840 reg = <0x7e204000 0x200>;
1841 interrupts = <2 22>;
1842 clocks = <&clocks BCM2835_CLOCK_VPU>;
1843 - dmas = <&dma 6>, <&dma 7>;
1844 - dma-names = "tx", "rx";
1845 #address-cells = <1>;
1846 #size-cells = <0>;
1847 status = "disabled";
1848 @@ -541,32 +447,6 @@
1849 status = "disabled";
1850 };
1851
1852 - csi0: csi@7e800000 {
1853 - compatible = "brcm,bcm2835-unicam";
1854 - reg = <0x7e800000 0x800>,
1855 - <0x7e802000 0x4>;
1856 - interrupts = <2 6>;
1857 - clocks = <&clocks BCM2835_CLOCK_CAM0>;
1858 - clock-names = "lp";
1859 - #address-cells = <1>;
1860 - #size-cells = <0>;
1861 - #clock-cells = <1>;
1862 - status = "disabled";
1863 - };
1864 -
1865 - csi1: csi@7e801000 {
1866 - compatible = "brcm,bcm2835-unicam";
1867 - reg = <0x7e801000 0x800>,
1868 - <0x7e802004 0x4>;
1869 - interrupts = <2 7>;
1870 - clocks = <&clocks BCM2835_CLOCK_CAM1>;
1871 - clock-names = "lp";
1872 - #address-cells = <1>;
1873 - #size-cells = <0>;
1874 - #clock-cells = <1>;
1875 - status = "disabled";
1876 - };
1877 -
1878 i2c1: i2c@7e804000 {
1879 compatible = "brcm,bcm2835-i2c";
1880 reg = <0x7e804000 0x1000>;
1881 @@ -577,16 +457,6 @@
1882 status = "disabled";
1883 };
1884
1885 - i2c2: i2c@7e805000 {
1886 - compatible = "brcm,bcm2835-i2c";
1887 - reg = <0x7e805000 0x1000>;
1888 - interrupts = <2 21>;
1889 - clocks = <&clocks BCM2835_CLOCK_VPU>;
1890 - #address-cells = <1>;
1891 - #size-cells = <0>;
1892 - status = "disabled";
1893 - };
1894 -
1895 vec: vec@7e806000 {
1896 compatible = "brcm,bcm2835-vec";
1897 reg = <0x7e806000 0x1000>;
1898 @@ -595,20 +465,6 @@
1899 status = "disabled";
1900 };
1901
1902 - hdmi: hdmi@7e902000 {
1903 - compatible = "brcm,bcm2835-hdmi";
1904 - reg = <0x7e902000 0x600>,
1905 - <0x7e808000 0x100>;
1906 - interrupts = <2 8>, <2 9>;
1907 - ddc = <&i2c2>;
1908 - clocks = <&clocks BCM2835_PLLH_PIX>,
1909 - <&clocks BCM2835_CLOCK_HSM>;
1910 - clock-names = "pixel", "hdmi";
1911 - dmas = <&dma 17>;
1912 - dma-names = "audio-rx";
1913 - status = "disabled";
1914 - };
1915 -
1916 usb: usb@7e980000 {
1917 compatible = "brcm,bcm2835-usb";
1918 reg = <0x7e980000 0x10000>;
1919 @@ -620,10 +476,6 @@
1920 phys = <&usbphy>;
1921 phy-names = "usb2-phy";
1922 };
1923 -
1924 - vc4: gpu {
1925 - compatible = "brcm,bcm2835-vc4";
1926 - };
1927 };
1928
1929 clocks {
OpenWrt Source Repository