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kernel: bump 5.4 to 5.4.99
[openwrt/openwrt.git] / target / linux / bcm27xx / patches-5.4 / 950-0411-overlays-Add-ssd1306-spi-ssh1106-spi-ssd-1351-spi.patch
1 From fe90ee51b283f7cbbce9980b76b3da8b31d39c60 Mon Sep 17 00:00:00 2001
2 From: MikeDK <m.kaplan@evva.com>
3 Date: Fri, 31 Jan 2020 10:57:21 +0100
4 Subject: [PATCH] overlays: Add ssd1306-spi, ssh1106-spi, ssd-1351-spi
5
6 Add overlays for SSD1306, SH1106 and SSD1351 based OLED displays.
7 SH1106 is present in many 1.3 inch OLEDs and SSD1351 is present in
8 1.5 inch RGB OLEDs from AliExpress.
9
10 This will load the staging fbtft drivers.
11
12 Signed-off-by: Michael Kaplan <m.kaplan@evva.com>
13 ---
14 arch/arm/boot/dts/overlays/Makefile | 3 +
15 arch/arm/boot/dts/overlays/README | 35 ++++++++
16 .../boot/dts/overlays/sh1106-spi-overlay.dts | 84 +++++++++++++++++++
17 .../boot/dts/overlays/ssd1306-spi-overlay.dts | 84 +++++++++++++++++++
18 .../boot/dts/overlays/ssd1351-spi-overlay.dts | 83 ++++++++++++++++++
19 5 files changed, 289 insertions(+)
20 create mode 100644 arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
21 create mode 100644 arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
22 create mode 100644 arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
23
24 --- a/arch/arm/boot/dts/overlays/Makefile
25 +++ b/arch/arm/boot/dts/overlays/Makefile
26 @@ -145,6 +145,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
27 sdhost.dtbo \
28 sdio.dtbo \
29 sdtweak.dtbo \
30 + sh1106-spi.dtbo \
31 smi.dtbo \
32 smi-dev.dtbo \
33 smi-nand.dtbo \
34 @@ -168,6 +169,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
35 spi6-1cs.dtbo \
36 spi6-2cs.dtbo \
37 ssd1306.dtbo \
38 + ssd1306-spi.dtbo \
39 + ssd1351-spi.dtbo \
40 superaudioboard.dtbo \
41 sx150x.dtbo \
42 tc358743.dtbo \
43 --- a/arch/arm/boot/dts/overlays/README
44 +++ b/arch/arm/boot/dts/overlays/README
45 @@ -2145,6 +2145,18 @@ Params: overclock_50 Clock (i
46 (default on)
47
48
49 +Name: sh1106-spi
50 +Info: Overlay for SH1106 OLED via SPI using fbtft staging driver.
51 +Load: dtoverlay=sh1106-spi,<param>=<val>
52 +Params: speed SPI bus speed (default 4000000)
53 + rotate Display rotation (0, 90, 180 or 270; default 0)
54 + fps Delay between frame updates (default 25)
55 + debug Debug output level (0-7; default 0)
56 + dc_pin GPIO pin for D/C (default 24)
57 + reset_pin GPIO pin for RESET (default 25)
58 + height Display height (32 or 64; default 64)
59 +
60 +
61 Name: smi
62 Info: Enables the Secondary Memory Interface peripheral. Uses GPIOs 2-25!
63 Load: dtoverlay=smi
64 @@ -2428,6 +2440,29 @@ Params: address Location
65 https://cdn-shop.adafruit.com/datasheets/SSD1306.pdf
66
67
68 +Name: ssd1306-spi
69 +Info: Overlay for SSD1306 OLED via SPI using fbtft staging driver.
70 +Load: dtoverlay=ssd1306-spi,<param>=<val>
71 +Params: speed SPI bus speed (default 10000000)
72 + rotate Display rotation (0, 90, 180 or 270; default 0)
73 + fps Delay between frame updates (default 25)
74 + debug Debug output level (0-7; default 0)
75 + dc_pin GPIO pin for D/C (default 24)
76 + reset_pin GPIO pin for RESET (default 25)
77 + height Display height (32 or 64; default 64)
78 +
79 +
80 +Name: ssd1351-spi
81 +Info: Overlay for SSD1351 OLED via SPI using fbtft staging driver.
82 +Load: dtoverlay=ssd1351-spi,<param>=<val>
83 +Params: speed SPI bus speed (default 4500000)
84 + rotate Display rotation (0, 90, 180 or 270; default 0)
85 + fps Delay between frame updates (default 25)
86 + debug Debug output level (0-7; default 0)
87 + dc_pin GPIO pin for D/C (default 24)
88 + reset_pin GPIO pin for RESET (default 25)
89 +
90 +
91 Name: superaudioboard
92 Info: Configures the SuperAudioBoard sound card
93 Load: dtoverlay=superaudioboard,<param>=<val>
94 --- /dev/null
95 +++ b/arch/arm/boot/dts/overlays/sh1106-spi-overlay.dts
96 @@ -0,0 +1,84 @@
97 +/*
98 + * Device Tree overlay for SH1106 based SPI OLED display
99 + *
100 + */
101 +
102 +/dts-v1/;
103 +/plugin/;
104 +
105 +/ {
106 + compatible = "brcm,bcm2835";
107 +
108 + fragment@0 {
109 + target = <&spi0>;
110 + __overlay__ {
111 + status = "okay";
112 + };
113 + };
114 +
115 + fragment@1 {
116 + target = <&spidev0>;
117 + __overlay__ {
118 + status = "disabled";
119 + };
120 + };
121 +
122 + fragment@2 {
123 + target = <&spidev1>;
124 + __overlay__ {
125 + status = "disabled";
126 + };
127 + };
128 +
129 + fragment@3 {
130 + target = <&gpio>;
131 + __overlay__ {
132 + sh1106_pins: sh1106_pins {
133 + brcm,pins = <25 24>;
134 + brcm,function = <1 1>; /* out out */
135 + };
136 + };
137 + };
138 +
139 + fragment@4 {
140 + target = <&spi0>;
141 + __overlay__ {
142 + /* needed to avoid dtc warning */
143 + #address-cells = <1>;
144 + #size-cells = <0>;
145 +
146 + sh1106: sh1106@0{
147 + compatible = "sinowealth,sh1106";
148 + reg = <0>;
149 + pinctrl-names = "default";
150 + pinctrl-0 = <&sh1106_pins>;
151 +
152 + spi-max-frequency = <4000000>;
153 + bgr = <0>;
154 + bpp = <1>;
155 + rotate = <0>;
156 + fps = <25>;
157 + buswidth = <8>;
158 + reset-gpios = <&gpio 25 0>;
159 + dc-gpios = <&gpio 24 0>;
160 + debug = <0>;
161 +
162 + sinowealth,height = <64>;
163 + sinowealth,width = <128>;
164 + sinowealth,page-offset = <0>;
165 + };
166 + };
167 + };
168 +
169 + __overrides__ {
170 + speed = <&sh1106>,"spi-max-frequency:0";
171 + rotate = <&sh1106>,"rotate:0";
172 + fps = <&sh1106>,"fps:0";
173 + debug = <&sh1106>,"debug:0";
174 + dc_pin = <&sh1106>,"dc-gpios:4",
175 + <&sh1106_pins>,"brcm,pins:4";
176 + reset_pin = <&sh1106>,"reset-gpios:4",
177 + <&sh1106_pins>,"brcm,pins:0";
178 + height = <&sh1106>,"sinowealth,height:0";
179 + };
180 +};
181 --- /dev/null
182 +++ b/arch/arm/boot/dts/overlays/ssd1306-spi-overlay.dts
183 @@ -0,0 +1,84 @@
184 +/*
185 + * Device Tree overlay for SSD1306 based SPI OLED display
186 + *
187 + */
188 +
189 +/dts-v1/;
190 +/plugin/;
191 +
192 +/ {
193 + compatible = "brcm,bcm2835";
194 +
195 + fragment@0 {
196 + target = <&spi0>;
197 + __overlay__ {
198 + status = "okay";
199 + };
200 + };
201 +
202 + fragment@1 {
203 + target = <&spidev0>;
204 + __overlay__ {
205 + status = "disabled";
206 + };
207 + };
208 +
209 + fragment@2 {
210 + target = <&spidev1>;
211 + __overlay__ {
212 + status = "disabled";
213 + };
214 + };
215 +
216 + fragment@3 {
217 + target = <&gpio>;
218 + __overlay__ {
219 + ssd1306_pins: ssd1306_pins {
220 + brcm,pins = <25 24>;
221 + brcm,function = <1 1>; /* out out */
222 + };
223 + };
224 + };
225 +
226 + fragment@4 {
227 + target = <&spi0>;
228 + __overlay__ {
229 + /* needed to avoid dtc warning */
230 + #address-cells = <1>;
231 + #size-cells = <0>;
232 +
233 + ssd1306: ssd1306@0{
234 + compatible = "solomon,ssd1306";
235 + reg = <0>;
236 + pinctrl-names = "default";
237 + pinctrl-0 = <&ssd1306_pins>;
238 +
239 + spi-max-frequency = <10000000>;
240 + bgr = <0>;
241 + bpp = <1>;
242 + rotate = <0>;
243 + fps = <25>;
244 + buswidth = <8>;
245 + reset-gpios = <&gpio 25 0>;
246 + dc-gpios = <&gpio 24 0>;
247 + debug = <0>;
248 +
249 + solomon,height = <64>;
250 + solomon,width = <128>;
251 + solomon,page-offset = <0>;
252 + };
253 + };
254 + };
255 +
256 + __overrides__ {
257 + speed = <&ssd1306>,"spi-max-frequency:0";
258 + rotate = <&ssd1306>,"rotate:0";
259 + fps = <&ssd1306>,"fps:0";
260 + debug = <&ssd1306>,"debug:0";
261 + dc_pin = <&ssd1306>,"dc-gpios:4",
262 + <&ssd1306_pins>,"brcm,pins:4";
263 + reset_pin = <&ssd1306>,"reset-gpios:4",
264 + <&ssd1306_pins>,"brcm,pins:0";
265 + height = <&ssd1306>,"solomon,height:0";
266 + };
267 +};
268 --- /dev/null
269 +++ b/arch/arm/boot/dts/overlays/ssd1351-spi-overlay.dts
270 @@ -0,0 +1,83 @@
271 +/*
272 + * Device Tree overlay for SSD1351 based SPI OLED display
273 + *
274 + */
275 +
276 +/dts-v1/;
277 +/plugin/;
278 +
279 +/ {
280 + compatible = "brcm,bcm2835";
281 +
282 + fragment@0 {
283 + target = <&spi0>;
284 + __overlay__ {
285 + status = "okay";
286 + };
287 + };
288 +
289 + fragment@1 {
290 + target = <&spidev0>;
291 + __overlay__ {
292 + status = "disabled";
293 + };
294 + };
295 +
296 + fragment@2 {
297 + target = <&spidev1>;
298 + __overlay__ {
299 + status = "disabled";
300 + };
301 + };
302 +
303 + fragment@3 {
304 + target = <&gpio>;
305 + __overlay__ {
306 + ssd1351_pins: ssd1351_pins {
307 + brcm,pins = <25 24>;
308 + brcm,function = <1 1>; /* out out */
309 + };
310 + };
311 + };
312 +
313 + fragment@4 {
314 + target = <&spi0>;
315 + __overlay__ {
316 + /* needed to avoid dtc warning */
317 + #address-cells = <1>;
318 + #size-cells = <0>;
319 +
320 + ssd1351: ssd1351@0{
321 + compatible = "solomon,ssd1351";
322 + reg = <0>;
323 + pinctrl-names = "default";
324 + pinctrl-0 = <&ssd1351_pins>;
325 +
326 + spi-max-frequency = <4500000>;
327 + bgr = <0>;
328 + bpp = <16>;
329 + rotate = <0>;
330 + fps = <25>;
331 + buswidth = <8>;
332 + reset-gpios = <&gpio 25 0>;
333 + dc-gpios = <&gpio 24 0>;
334 + debug = <0>;
335 +
336 + solomon,height = <128>;
337 + solomon,width = <128>;
338 + solomon,page-offset = <0>;
339 + };
340 + };
341 + };
342 +
343 + __overrides__ {
344 + speed = <&ssd1351>,"spi-max-frequency:0";
345 + rotate = <&ssd1351>,"rotate:0";
346 + fps = <&ssd1351>,"fps:0";
347 + debug = <&ssd1351>,"debug:0";
348 + dc_pin = <&ssd1351>,"dc-gpios:4",
349 + <&ssd1351_pins>,"brcm,pins:4";
350 + reset_pin = <&ssd1351>,"reset-gpios:4",
351 + <&ssd1351_pins>,"brcm,pins:0";
352 + };
353 +};
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